FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 
47 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48 
49 #define NVENC_CAP 0x30
50 
51 #ifndef NVENC_NO_DEPRECATED_RC
52 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
53  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
54  rc == NV_ENC_PARAMS_RC_CBR_HQ)
55 #else
56 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
57 #endif
58 
64  AV_PIX_FMT_P016, // Truncated to 10bits
65 #ifdef NVENC_HAVE_422_SUPPORT
69 #endif
71  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
80  AV_PIX_FMT_GBRP16, // Truncated to 10bits
82 #if CONFIG_D3D11VA
84 #endif
86 };
87 
89  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
91 #if CONFIG_D3D11VA
92  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
94 #endif
95  NULL,
96 };
97 
98 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
99  pix_fmt == AV_PIX_FMT_P016 || \
100  pix_fmt == AV_PIX_FMT_P210 || \
101  pix_fmt == AV_PIX_FMT_P216 || \
102  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_X2RGB10 || \
105  pix_fmt == AV_PIX_FMT_X2BGR10 || \
106  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
107  pix_fmt == AV_PIX_FMT_GBRP16)
108 
109 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
110  pix_fmt == AV_PIX_FMT_RGB32 || \
111  pix_fmt == AV_PIX_FMT_0BGR32 || \
112  pix_fmt == AV_PIX_FMT_BGR32 || \
113  pix_fmt == AV_PIX_FMT_X2RGB10 || \
114  pix_fmt == AV_PIX_FMT_X2BGR10)
115 
116 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
117  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
118  pix_fmt == AV_PIX_FMT_YUV444P16 || \
119  pix_fmt == AV_PIX_FMT_GBRP || \
120  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
121  pix_fmt == AV_PIX_FMT_GBRP16 || \
122  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
123 
124 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
125  pix_fmt == AV_PIX_FMT_P210 || \
126  pix_fmt == AV_PIX_FMT_P216)
127 
128 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
129  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
130  pix_fmt == AV_PIX_FMT_GBRP16)
131 
132 static const struct {
133  NVENCSTATUS nverr;
134  int averr;
135  const char *desc;
136 } nvenc_errors[] = {
137  { NV_ENC_SUCCESS, 0, "success" },
138  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
139  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
140  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
141  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
142  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
143  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
144  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
145  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
146  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
147  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
148  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
149  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
150  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
151  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
152  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
153  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
154  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
155  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
156  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
157  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
158  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
159  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
160  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
161  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
162  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
163 };
164 
165 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
166 {
167  int i;
168  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
169  if (nvenc_errors[i].nverr == err) {
170  if (desc)
171  *desc = nvenc_errors[i].desc;
172  return nvenc_errors[i].averr;
173  }
174  }
175  if (desc)
176  *desc = "unknown error";
177  return AVERROR_UNKNOWN;
178 }
179 
180 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
181  const char *error_string)
182 {
183  const char *desc;
184  const char *details = "(no details)";
185  int ret = nvenc_map_error(err, &desc);
186 
187 #ifdef NVENC_HAVE_GETLASTERRORSTRING
188  NvencContext *ctx = avctx->priv_data;
189  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
190 
191  if (p_nvenc && ctx->nvencoder)
192  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
193 #endif
194 
195  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
196 
197  return ret;
198 }
199 
200 typedef struct GUIDTuple {
201  const GUID guid;
202  int flags;
203 } GUIDTuple;
204 
205 #define PRESET_ALIAS(alias, name, ...) \
206  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
207 
208 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
209 
211 {
212  GUIDTuple presets[] = {
213 #ifdef NVENC_HAVE_NEW_PRESETS
214  PRESET(P1),
215  PRESET(P2),
216  PRESET(P3),
217  PRESET(P4),
218  PRESET(P5),
219  PRESET(P6),
220  PRESET(P7),
222  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
224  // Compat aliases
229  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
234 #else
235  PRESET(DEFAULT),
236  PRESET(HP),
237  PRESET(HQ),
238  PRESET(BD),
239  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
240  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
242  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
243  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
244  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
245  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
246  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
247 #endif
248  };
249 
250  GUIDTuple *t = &presets[ctx->preset];
251 
252  ctx->init_encode_params.presetGUID = t->guid;
253  ctx->flags = t->flags;
254 
255 #ifdef NVENC_HAVE_NEW_PRESETS
256  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
258 #endif
259 }
260 
261 #undef PRESET
262 #undef PRESET_ALIAS
263 
265 {
266 #if NVENCAPI_CHECK_VERSION(13, 2)
267  const char *minver = "(unknown)";
268 #elif NVENCAPI_CHECK_VERSION(13, 1)
269  const char *minver = "610.00";
270 #elif NVENCAPI_CHECK_VERSION(13, 0)
271  const char *minver = "570.0";
272 #elif NVENCAPI_CHECK_VERSION(12, 2)
273 # if defined(_WIN32) || defined(__CYGWIN__)
274  const char *minver = "551.76";
275 # else
276  const char *minver = "550.54.14";
277 # endif
278 #elif NVENCAPI_CHECK_VERSION(12, 1)
279 # if defined(_WIN32) || defined(__CYGWIN__)
280  const char *minver = "531.61";
281 # else
282  const char *minver = "530.41.03";
283 # endif
284 #elif NVENCAPI_CHECK_VERSION(12, 0)
285 # if defined(_WIN32) || defined(__CYGWIN__)
286  const char *minver = "522.25";
287 # else
288  const char *minver = "520.56.06";
289 # endif
290 #elif NVENCAPI_CHECK_VERSION(11, 1)
291 # if defined(_WIN32) || defined(__CYGWIN__)
292  const char *minver = "471.41";
293 # else
294  const char *minver = "470.57.02";
295 # endif
296 #elif NVENCAPI_CHECK_VERSION(11, 0)
297 # if defined(_WIN32) || defined(__CYGWIN__)
298  const char *minver = "456.71";
299 # else
300  const char *minver = "455.28";
301 # endif
302 #elif NVENCAPI_CHECK_VERSION(10, 0)
303 # if defined(_WIN32) || defined(__CYGWIN__)
304  const char *minver = "450.51";
305 # else
306  const char *minver = "445.87";
307 # endif
308 #elif NVENCAPI_CHECK_VERSION(9, 1)
309 # if defined(_WIN32) || defined(__CYGWIN__)
310  const char *minver = "436.15";
311 # else
312  const char *minver = "435.21";
313 # endif
314 #elif NVENCAPI_CHECK_VERSION(9, 0)
315 # if defined(_WIN32) || defined(__CYGWIN__)
316  const char *minver = "418.81";
317 # else
318  const char *minver = "418.30";
319 # endif
320 #elif NVENCAPI_CHECK_VERSION(8, 2)
321 # if defined(_WIN32) || defined(__CYGWIN__)
322  const char *minver = "397.93";
323 # else
324  const char *minver = "396.24";
325 #endif
326 #elif NVENCAPI_CHECK_VERSION(8, 1)
327 # if defined(_WIN32) || defined(__CYGWIN__)
328  const char *minver = "390.77";
329 # else
330  const char *minver = "390.25";
331 # endif
332 #else
333 # if defined(_WIN32) || defined(__CYGWIN__)
334  const char *minver = "378.66";
335 # else
336  const char *minver = "378.13";
337 # endif
338 #endif
339  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
340 }
341 
342 #if NVENCAPI_CHECK_VERSION(12, 0)
343 #define to_nv_color_matrix(n) (NV_ENC_VUI_MATRIX_COEFFS)(n)
344 #define to_nv_color_pri(n) (NV_ENC_VUI_COLOR_PRIMARIES)(n)
345 #define to_nv_color_trc(n) (NV_ENC_VUI_TRANSFER_CHARACTERISTIC)(n)
346 #else
347 #define to_nv_color_matrix(n) (uint32_t)(n)
348 #define to_nv_color_pri(n) (uint32_t)(n)
349 #define to_nv_color_trc(n) (uint32_t)(n)
350 #endif
351 
353 {
354  NvencContext *ctx = avctx->priv_data;
355  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
356  NVENCSTATUS err;
357  uint32_t nvenc_max_ver;
358  int ret;
359 
360  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
361  if (ret < 0)
362  return ret;
363 
364  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
365  if (ret < 0) {
367  return ret;
368  }
369 
370  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
371  if (err != NV_ENC_SUCCESS)
372  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
373 
374  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
375 
376  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
377  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
378  "Required: %d.%d Found: %d.%d\n",
379  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
380  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
382  return AVERROR(ENOSYS);
383  }
384 
385  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
386 
387  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
388  if (err != NV_ENC_SUCCESS)
389  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
390 
391  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
392 
393  return 0;
394 }
395 
397 {
398  NvencContext *ctx = avctx->priv_data;
399  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
400 
401  if (ctx->d3d11_device)
402  return 0;
403 
404  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
405 }
406 
408 {
409  NvencContext *ctx = avctx->priv_data;
410  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
411  CUcontext dummy;
412 
413  if (ctx->d3d11_device)
414  return 0;
415 
416  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
417 }
418 
420 {
421  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
422  NvencContext *ctx = avctx->priv_data;
423  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
424  NVENCSTATUS ret;
425 
426  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
427  params.apiVersion = NVENCAPI_VERSION;
428  if (ctx->d3d11_device) {
429  params.device = ctx->d3d11_device;
430  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
431  } else {
432  params.device = ctx->cu_context;
433  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
434  }
435 
436  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
437  if (ret != NV_ENC_SUCCESS) {
438  ctx->nvencoder = NULL;
439  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
440  }
441 
442  return 0;
443 }
444 
446 {
447  NvencContext *ctx = avctx->priv_data;
448  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
449  int i, ret, count = 0;
450  GUID *guids = NULL;
451 
452  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
453 
454  if (ret != NV_ENC_SUCCESS || !count)
455  return AVERROR(ENOSYS);
456 
457  guids = av_malloc(count * sizeof(GUID));
458  if (!guids)
459  return AVERROR(ENOMEM);
460 
461  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
462  if (ret != NV_ENC_SUCCESS) {
463  ret = AVERROR(ENOSYS);
464  goto fail;
465  }
466 
467  ret = AVERROR(ENOSYS);
468  for (i = 0; i < count; i++) {
469  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
470  ret = 0;
471  break;
472  }
473  }
474 
475 fail:
476  av_free(guids);
477 
478  return ret;
479 }
480 
481 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
482 {
483  NvencContext *ctx = avctx->priv_data;
484  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
485  NV_ENC_CAPS_PARAM params = { 0 };
486  int ret, val = 0;
487 
488  params.version = NV_ENC_CAPS_PARAM_VER;
489  params.capsToQuery = cap;
490 
491  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
492 
493  if (ret == NV_ENC_SUCCESS)
494  return val;
495  return 0;
496 }
497 
499 {
500  NvencContext *ctx = avctx->priv_data;
501  int tmp, ret;
502 
504  if (ret < 0) {
505  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
506  return ret;
507  }
508 
509  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
510  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
511  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
512  return AVERROR(ENOSYS);
513  }
514 
515 #ifdef NVENC_HAVE_422_SUPPORT
516  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
517 #else
518  ret = 0;
519 #endif
520  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
521  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
522  return AVERROR(ENOSYS);
523  }
524 
525  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
526  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
527  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
528  return AVERROR(ENOSYS);
529  }
530 
531  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
532  if (ret < avctx->width) {
533  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
534  avctx->width, ret);
535  return AVERROR(ENOSYS);
536  }
537 
538  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
539  if (ret < avctx->height) {
540  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
541  avctx->height, ret);
542  return AVERROR(ENOSYS);
543  }
544 
545  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
546  if (ret < avctx->max_b_frames) {
547  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
548  avctx->max_b_frames, ret);
549 
550  return AVERROR(ENOSYS);
551  }
552 
553  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
554  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
555  av_log(avctx, AV_LOG_WARNING,
556  "Interlaced encoding is not supported. Supported level: %d\n",
557  ret);
558  return AVERROR(ENOSYS);
559  }
560 
561  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
562  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
563  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
564  return AVERROR(ENOSYS);
565  }
566 
567  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
568  if (ctx->rc_lookahead > 0 && ret <= 0) {
569  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
570  return AVERROR(ENOSYS);
571  }
572 
573  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
574  if (ctx->temporal_aq > 0 && ret <= 0) {
575  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
576  return AVERROR(ENOSYS);
577  }
578 
579  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
580  if (ctx->weighted_pred > 0 && ret <= 0) {
581  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
582  return AVERROR(ENOSYS);
583  }
584 
585  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
586  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
587  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
588  return AVERROR(ENOSYS);
589  }
590 
591 #ifdef NVENC_HAVE_BFRAME_REF_MODE
592  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
593  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
594  switch (tmp) {
595  case NV_ENC_BFRAME_REF_MODE_DISABLED:
596  break;
597  case NV_ENC_BFRAME_REF_MODE_EACH:
598  if (!(ret & 1)) {
599  av_log(avctx, AV_LOG_WARNING, "Each B frame reference mode is not supported\n");
600  return AVERROR(ENOSYS);
601  }
602  break;
603  case NV_ENC_BFRAME_REF_MODE_MIDDLE:
604  if (!(ret & 2)) {
605  av_log(avctx, AV_LOG_WARNING, "Middle B frame reference mode is not supported\n");
606  return AVERROR(ENOSYS);
607  }
608  break;
609  default:
610  av_log(avctx, AV_LOG_ERROR, "Unknown B frame reference mode!\n");
611  return AVERROR_BUG;
612  }
613 #else
614  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
615  if (tmp > 0) {
616  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
617  return AVERROR(ENOSYS);
618  }
619 #endif
620 
621 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
622  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
623  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
624  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
625  return AVERROR(ENOSYS);
626  }
627 #else
628  if(avctx->refs != 0) {
629  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
630  return AVERROR(ENOSYS);
631  }
632 #endif
633 
634 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
635  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
636  if(ctx->single_slice_intra_refresh && ret <= 0) {
637  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
638  return AVERROR(ENOSYS);
639  }
640 #else
641  if(ctx->single_slice_intra_refresh) {
642  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
643  return AVERROR(ENOSYS);
644  }
645 #endif
646 
647  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
648  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
649  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
650  return AVERROR(ENOSYS);
651  }
652 
653 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
654  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
655  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
656  return AVERROR(ENOSYS);
657  }
658 #endif
659 
660  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
661  if(ctx->constrained_encoding && ret <= 0) {
662  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
663  return AVERROR(ENOSYS);
664  }
665 
666 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
667  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
668  if(ctx->tf_level > 0 && ret <= 0) {
669  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
670  return AVERROR(ENOSYS);
671  }
672 #endif
673 
674 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
675  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
676  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
677  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
678  ctx->lookahead_level > ret)
679  {
680  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
681  return AVERROR(ENOSYS);
682  }
683 #endif
684 
685 #ifdef NVENC_HAVE_UNIDIR_B
686  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
687  if(ctx->unidir_b && ret <= 0) {
688  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
689  return AVERROR(ENOSYS);
690  }
691 #endif
692 
693  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
694 
695 #ifdef NVENC_HAVE_MVHEVC
696  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
697  if (avctx->codec_id == AV_CODEC_ID_HEVC &&
698  ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN &&
699  !ctx->multiview_supported) {
700  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
701  return AVERROR(ENOSYS);
702  }
703 #endif
704 
705  return 0;
706 }
707 
708 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
709 {
710  NvencContext *ctx = avctx->priv_data;
711  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
712  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
713  char name[128] = { 0};
714  int major, minor, ret;
715  CUdevice cu_device;
716  int loglevel = AV_LOG_VERBOSE;
717 
718  if (ctx->device == LIST_DEVICES)
719  loglevel = AV_LOG_INFO;
720 
721  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
722  if (ret < 0)
723  return ret;
724 
725  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
726  if (ret < 0)
727  return ret;
728 
729  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
730  if (ret < 0)
731  return ret;
732 
733  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
734  if (((major << 4) | minor) < NVENC_CAP) {
735  av_log(avctx, loglevel, "does not support NVENC\n");
736  goto fail;
737  }
738 
739  if (ctx->device != idx && ctx->device != ANY_DEVICE)
740  return -1;
741 
742  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
743  if (ret < 0)
744  goto fail;
745 
746  ctx->cu_context = ctx->cu_context_internal;
747  ctx->cu_stream = NULL;
748 
749  if ((ret = nvenc_pop_context(avctx)) < 0)
750  goto fail2;
751 
752  if ((ret = nvenc_open_session(avctx)) < 0)
753  goto fail2;
754 
755  if ((ret = nvenc_check_capabilities(avctx)) < 0)
756  goto fail3;
757 
758  av_log(avctx, loglevel, "supports NVENC\n");
759 
760  dl_fn->nvenc_device_count++;
761 
762  if (ctx->device == idx || ctx->device == ANY_DEVICE)
763  return 0;
764 
765 fail3:
766  if ((ret = nvenc_push_context(avctx)) < 0)
767  return ret;
768 
769  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
770  ctx->nvencoder = NULL;
771 
772  if ((ret = nvenc_pop_context(avctx)) < 0)
773  return ret;
774 
775 fail2:
776  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
777  ctx->cu_context_internal = NULL;
778 
779 fail:
780  return AVERROR(ENOSYS);
781 }
782 
784 {
785  NvencContext *ctx = avctx->priv_data;
786  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
787 
788  switch (avctx->codec->id) {
789  case AV_CODEC_ID_H264:
790  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
791  break;
792  case AV_CODEC_ID_HEVC:
793  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
794  break;
795 #if CONFIG_AV1_NVENC_ENCODER
796  case AV_CODEC_ID_AV1:
797  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
798  break;
799 #endif
800  default:
801  return AVERROR_BUG;
802  }
803 
805 
807  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
808 
809  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
810  AVHWFramesContext *frames_ctx;
811  AVHWDeviceContext *hwdev_ctx;
812  AVCUDADeviceContext *cuda_device_hwctx = NULL;
813 #if CONFIG_D3D11VA
814  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
815 #endif
816  int ret;
817 
818  if (avctx->hw_frames_ctx) {
819  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
820  if (frames_ctx->format == AV_PIX_FMT_CUDA)
821  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
822 #if CONFIG_D3D11VA
823  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
824  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
825 #endif
826  else
827  return AVERROR(EINVAL);
828  } else if (avctx->hw_device_ctx) {
829  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
830  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
831  cuda_device_hwctx = hwdev_ctx->hwctx;
832 #if CONFIG_D3D11VA
833  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
834  d3d11_device_hwctx = hwdev_ctx->hwctx;
835 #endif
836  else
837  return AVERROR(EINVAL);
838  } else {
839  return AVERROR(EINVAL);
840  }
841 
842  if (cuda_device_hwctx) {
843  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
844  ctx->cu_stream = cuda_device_hwctx->stream;
845  }
846 #if CONFIG_D3D11VA
847  else if (d3d11_device_hwctx) {
848  ctx->d3d11_device = d3d11_device_hwctx->device;
849  ID3D11Device_AddRef(ctx->d3d11_device);
850  }
851 #endif
852 
853  ret = nvenc_open_session(avctx);
854  if (ret < 0)
855  return ret;
856 
857  ret = nvenc_check_capabilities(avctx);
858  if (ret < 0) {
859  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
860  return ret;
861  }
862  } else {
863  int i, nb_devices = 0;
864 
865  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
866  return AVERROR_UNKNOWN;
867 
868  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
869  return AVERROR_UNKNOWN;
870 
871  if (!nb_devices) {
872  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
873  return AVERROR_EXTERNAL;
874  }
875 
876  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
877 
878  dl_fn->nvenc_device_count = 0;
879  for (i = 0; i < nb_devices; ++i) {
880  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
881  return 0;
882  }
883 
884  if (ctx->device == LIST_DEVICES)
885  return AVERROR_EXIT;
886 
887  if (!dl_fn->nvenc_device_count) {
888  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
889  return AVERROR_EXTERNAL;
890  }
891 
892  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
893  return AVERROR(EINVAL);
894  }
895 
896  return 0;
897 }
898 
899 static av_cold void set_constqp(AVCodecContext *avctx)
900 {
901  NvencContext *ctx = avctx->priv_data;
902  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
903 #if CONFIG_AV1_NVENC_ENCODER
904  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
905 #else
906  int qmax = 51;
907 #endif
908 
909  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
910 
911  if (ctx->init_qp_p >= 0) {
912  rc->constQP.qpInterP = ctx->init_qp_p;
913  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
914  rc->constQP.qpIntra = ctx->init_qp_i;
915  rc->constQP.qpInterB = ctx->init_qp_b;
916  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
917  rc->constQP.qpIntra = av_clip(
918  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
919  rc->constQP.qpInterB = av_clip(
920  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
921  } else {
922  rc->constQP.qpIntra = rc->constQP.qpInterP;
923  rc->constQP.qpInterB = rc->constQP.qpInterP;
924  }
925  } else if (ctx->cqp >= 0) {
926  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
927  if (avctx->b_quant_factor != 0.0)
928  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
929  if (avctx->i_quant_factor != 0.0)
930  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
931  }
932 
933  avctx->qmin = ctx->qmin = -1;
934  avctx->qmax = ctx->qmax = -1;
935 }
936 
937 static av_cold void set_vbr(AVCodecContext *avctx)
938 {
939  NvencContext *ctx = avctx->priv_data;
940  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
941  int qp_inter_p;
942 #if CONFIG_AV1_NVENC_ENCODER
943  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
944 #else
945  int qmax = 51;
946 #endif
947 
948  if (avctx->qmin >= 0 || avctx->qmax >= 0)
949  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
950 
951  if (avctx->qmin >= 0 && ctx->qmin < 0)
952  ctx->qmin = avctx->qmin;
953  if (avctx->qmax >= 0 && ctx->qmax < 0)
954  ctx->qmax = avctx->qmax;
955  avctx->qmin = ctx->qmin;
956  avctx->qmax = ctx->qmax;
957 
958  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
959  rc->enableMinQP = 1;
960  rc->enableMaxQP = 1;
961 
962  rc->minQP.qpInterB = ctx->qmin;
963  rc->minQP.qpInterP = ctx->qmin;
964  rc->minQP.qpIntra = ctx->qmin;
965 
966  rc->maxQP.qpInterB = ctx->qmax;
967  rc->maxQP.qpInterP = ctx->qmax;
968  rc->maxQP.qpIntra = ctx->qmax;
969 
970  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
971  } else if (ctx->qmin >= 0) {
972  rc->enableMinQP = 1;
973 
974  rc->minQP.qpInterB = ctx->qmin;
975  rc->minQP.qpInterP = ctx->qmin;
976  rc->minQP.qpIntra = ctx->qmin;
977 
978  qp_inter_p = ctx->qmin;
979  } else {
980  qp_inter_p = 26; // default to 26
981  }
982 
983  rc->enableInitialRCQP = 1;
984 
985  if (ctx->init_qp_p < 0) {
986  rc->initialRCQP.qpInterP = qp_inter_p;
987  } else {
988  rc->initialRCQP.qpInterP = ctx->init_qp_p;
989  }
990 
991  if (ctx->init_qp_i < 0) {
992  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
993  rc->initialRCQP.qpIntra = av_clip(
994  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
995  } else {
996  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
997  }
998  } else {
999  rc->initialRCQP.qpIntra = ctx->init_qp_i;
1000  }
1001 
1002  if (ctx->init_qp_b < 0) {
1003  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
1004  rc->initialRCQP.qpInterB = av_clip(
1005  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
1006  } else {
1007  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
1008  }
1009  } else {
1010  rc->initialRCQP.qpInterB = ctx->init_qp_b;
1011  }
1012 }
1013 
1015 {
1016  NvencContext *ctx = avctx->priv_data;
1017  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1018 
1019  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
1020  rc->constQP.qpInterB = 0;
1021  rc->constQP.qpInterP = 0;
1022  rc->constQP.qpIntra = 0;
1023 
1024  avctx->qmin = ctx->qmin = -1;
1025  avctx->qmax = ctx->qmax = -1;
1026 }
1027 
1029 {
1030  NvencContext *ctx = avctx->priv_data;
1031  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1032 
1033  switch (ctx->rc) {
1034  case NV_ENC_PARAMS_RC_CONSTQP:
1035  set_constqp(avctx);
1036  return;
1037 #ifndef NVENC_NO_DEPRECATED_RC
1038  case NV_ENC_PARAMS_RC_VBR_MINQP:
1039  if (avctx->qmin < 0 && ctx->qmin < 0) {
1040  av_log(avctx, AV_LOG_WARNING,
1041  "The variable bitrate rate-control requires "
1042  "the 'qmin' option set.\n");
1043  set_vbr(avctx);
1044  return;
1045  }
1046  /* fall through */
1047  case NV_ENC_PARAMS_RC_VBR_HQ:
1048 #endif
1049  case NV_ENC_PARAMS_RC_VBR:
1050  set_vbr(avctx);
1051  break;
1052  case NV_ENC_PARAMS_RC_CBR:
1053 #ifndef NVENC_NO_DEPRECATED_RC
1054  case NV_ENC_PARAMS_RC_CBR_HQ:
1055  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1056 #endif
1057  break;
1058  }
1059 
1060  rc->rateControlMode = ctx->rc;
1061 }
1062 
1064 {
1065  NvencContext *ctx = avctx->priv_data;
1066  // default minimum of 4 surfaces
1067  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1068  // another multiply by 2 to avoid blocking next PBB group
1069  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1070 
1071  // lookahead enabled
1072  if (ctx->rc_lookahead > 0) {
1073  // +1 is to account for lkd_bound calculation later
1074  // +4 is to allow sufficient pipelining with lookahead
1075  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1076  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1077  {
1078  av_log(avctx, AV_LOG_WARNING,
1079  "Defined rc_lookahead requires more surfaces, "
1080  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1081  }
1082  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1083  } else {
1084  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1085  {
1086  av_log(avctx, AV_LOG_WARNING,
1087  "Defined b-frame requires more surfaces, "
1088  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1089  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1090  }
1091  else if (ctx->nb_surfaces <= 0)
1092  ctx->nb_surfaces = nb_surfaces;
1093  // otherwise use user specified value
1094  }
1095 
1096  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1097  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1098 
1099  // Output in the worst case will only start when the surface buffer is completely full.
1100  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1101  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1102 
1103  return 0;
1104 }
1105 
1107 {
1108  NvencContext *ctx = avctx->priv_data;
1109 
1110  if (avctx->global_quality > 0)
1111  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1112 
1113  if (ctx->cqp < 0 && avctx->global_quality > 0)
1114  ctx->cqp = avctx->global_quality;
1115 
1116  if (avctx->bit_rate > 0) {
1117  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1118  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1119  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1120  }
1121 
1122  if (avctx->rc_max_rate > 0)
1123  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1124 
1125 #ifdef NVENC_HAVE_MULTIPASS
1126  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1127 
1128  if (ctx->flags & NVENC_ONE_PASS)
1129  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1130  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1131  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1132 
1133  if (ctx->rc < 0) {
1134  if (ctx->cbr) {
1135  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1136  } else if (ctx->cqp >= 0) {
1137  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1138  } else if (ctx->quality >= 0.0f) {
1139  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1140  }
1141  }
1142 #else
1143  if (ctx->rc < 0) {
1144  if (ctx->flags & NVENC_ONE_PASS)
1145  ctx->twopass = 0;
1146  if (ctx->flags & NVENC_TWO_PASSES)
1147  ctx->twopass = 1;
1148 
1149  if (ctx->twopass < 0)
1150  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1151 
1152  if (ctx->cbr) {
1153  if (ctx->twopass) {
1154  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1155  } else {
1156  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1157  }
1158  } else if (ctx->cqp >= 0) {
1159  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1160  } else if (ctx->twopass) {
1161  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1162  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1163  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1164  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1165  }
1166  }
1167 #endif
1168 
1169  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1170  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1171  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1172 
1173  ctx->rc &= ~RC_MODE_DEPRECATED;
1174  }
1175 
1176 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1177  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1178  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1179 
1180  if (avctx->codec->id == AV_CODEC_ID_AV1 &&
1181  ctx->qp_cr_offset != ctx->qp_cb_offset)
1182  av_log(avctx, AV_LOG_WARNING,
1183  "av1_nvenc: qp_cr_offset is currently ignored by the NVENC driver "
1184  "(deltaQ_v_ac is forced equal to deltaQ_u_ac); only qp_cb_offset "
1185  "takes effect.\n");
1186 #else
1187  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1188  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1189 #endif
1190 
1191 #ifdef NVENC_HAVE_LDKFS
1192  if (ctx->ldkfs)
1193  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1194 #endif
1195 
1196  if (ctx->flags & NVENC_LOSSLESS) {
1197  set_lossless(avctx);
1198  } else if (ctx->rc >= 0) {
1200  } else {
1201  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1202  set_vbr(avctx);
1203  }
1204 
1205  if (avctx->rc_buffer_size > 0) {
1206  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1207  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1208  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1209  }
1210 
1211  if (ctx->aq) {
1212  ctx->encode_config.rcParams.enableAQ = 1;
1213  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1214  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1215  }
1216 
1217  if (ctx->temporal_aq) {
1218  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1219  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1220  }
1221 
1222  if (ctx->rc_lookahead > 0) {
1223  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1224  ctx->encode_config.frameIntervalP - 4;
1225 
1226  if (lkd_bound < 0) {
1227  ctx->encode_config.rcParams.enableLookahead = 0;
1228  av_log(avctx, AV_LOG_WARNING,
1229  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1230  } else {
1231  ctx->encode_config.rcParams.enableLookahead = 1;
1232  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1233  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1234  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1235  av_log(avctx, AV_LOG_VERBOSE,
1236  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1237  ctx->encode_config.rcParams.lookaheadDepth,
1238  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1239  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1240  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1241  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1242  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1243 
1244 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1245  if (ctx->lookahead_level >= 0) {
1246  switch (ctx->lookahead_level) {
1247  case NV_ENC_LOOKAHEAD_LEVEL_0:
1248  case NV_ENC_LOOKAHEAD_LEVEL_1:
1249  case NV_ENC_LOOKAHEAD_LEVEL_2:
1250  case NV_ENC_LOOKAHEAD_LEVEL_3:
1251  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1252  break;
1253  default:
1254  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1255  return AVERROR(EINVAL);
1256  }
1257 
1258  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1259  }
1260 #endif
1261  }
1262  }
1263 
1264  if (ctx->strict_gop) {
1265  ctx->encode_config.rcParams.strictGOPTarget = 1;
1266  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1267  }
1268 
1269  if (ctx->nonref_p)
1270  ctx->encode_config.rcParams.enableNonRefP = 1;
1271 
1272  if (ctx->zerolatency)
1273  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1274 
1275  if (ctx->quality) {
1276  //convert from float to fixed point 8.8
1277  int tmp_quality = (int)(ctx->quality * 256.0f);
1278  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1279  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1280 
1281  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1282 
1283  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1284  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1285  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1286  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1287  }
1288 
1289  return 0;
1290 }
1291 
1293 {
1294  NvencContext *ctx = avctx->priv_data;
1295  NV_ENC_CONFIG *cc = &ctx->encode_config;
1296  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1297  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1298 
1299  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1300 
1301  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1302  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1303  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1304  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1305  vui->videoFullRangeFlag = 0;
1306  } else {
1307  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1308  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1309  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1310  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1311  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1312  }
1313 
1314  vui->colourDescriptionPresentFlag =
1315  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1316 
1317  vui->videoSignalTypePresentFlag =
1318  (vui->colourDescriptionPresentFlag
1319  || vui->videoFormat != 5
1320  || vui->videoFullRangeFlag != 0);
1321 
1322  if (ctx->max_slice_size > 0) {
1323  h264->sliceMode = 1;
1324  h264->sliceModeData = ctx->max_slice_size;
1325  } else {
1326  h264->sliceMode = 3;
1327  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1328  }
1329 
1330  if (ctx->intra_refresh) {
1331  h264->enableIntraRefresh = 1;
1332  h264->intraRefreshPeriod = cc->gopLength;
1333  h264->intraRefreshCnt = cc->gopLength - 1;
1334  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1335  h264->outputRecoveryPointSEI = 1;
1336 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1337  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1338 #endif
1339  }
1340 
1341  if (ctx->constrained_encoding)
1342  h264->enableConstrainedEncoding = 1;
1343 
1344  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1345  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1346  h264->outputAUD = ctx->aud;
1347 
1348  if (ctx->dpb_size >= 0) {
1349  /* 0 means "let the hardware decide" */
1350  h264->maxNumRefFrames = ctx->dpb_size;
1351  }
1352 
1353  h264->idrPeriod = cc->gopLength;
1354 
1355  if (IS_CBR(cc->rcParams.rateControlMode)) {
1356  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1357  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1358 
1359 #ifdef NVENC_HAVE_FILLER_DATA
1360  h264->enableFillerDataInsertion = ctx->cbr_padding;
1361 #endif
1362  }
1363 
1364  h264->outputPictureTimingSEI = 1;
1365 
1366 #ifndef NVENC_NO_DEPRECATED_RC
1367  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1368  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1369  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1370  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1371  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1372  }
1373 #endif
1374 
1375  if (ctx->flags & NVENC_LOSSLESS) {
1376  h264->qpPrimeYZeroTransformBypassFlag = 1;
1377  } else {
1378  switch(ctx->profile) {
1380  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1382  if (cc->frameIntervalP > 1) {
1383  av_log(avctx, AV_LOG_WARNING,
1384  "B-frames are not supported by H.264 Baseline profile, disabling.\n");
1385  cc->frameIntervalP = 1;
1386  }
1387  break;
1389  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1390  avctx->profile = AV_PROFILE_H264_MAIN;
1391  break;
1393  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1394  avctx->profile = AV_PROFILE_H264_HIGH;
1395  break;
1396 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1397  case NV_ENC_H264_PROFILE_HIGH_10:
1398  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1400  break;
1401 #endif
1402 #ifdef NVENC_HAVE_422_SUPPORT
1403  case NV_ENC_H264_PROFILE_HIGH_422:
1404  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1406  break;
1407 #endif
1409  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1411  break;
1412  }
1413  }
1414 
1415 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1416  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1417  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1418  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1420  }
1421 #endif
1422 
1423  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1424  if (IS_YUV444(ctx->data_pix_fmt)) {
1425  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1427  }
1428 
1429 #ifdef NVENC_HAVE_422_SUPPORT
1430  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1431  if (IS_YUV422(ctx->data_pix_fmt)) {
1432  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1434  }
1435 #endif
1436 
1437  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1438 
1439  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1440 
1441  h264->level = ctx->level;
1442 
1443 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1444  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1445  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1446 #endif
1447 
1448  if (ctx->coder >= 0)
1449  h264->entropyCodingMode = ctx->coder;
1450 
1451 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1452  if (ctx->b_ref_mode >= 0)
1453  h264->useBFramesAsRef = ctx->b_ref_mode;
1454 #endif
1455 
1456 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1457  h264->numRefL0 = avctx->refs;
1458  h264->numRefL1 = avctx->refs;
1459 #endif
1460 
1461 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1462  if (ctx->tf_level >= 0) {
1463  h264->tfLevel = ctx->tf_level;
1464 
1465  switch (ctx->tf_level)
1466  {
1467  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1468  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1469  break;
1470  default:
1471  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1472  return AVERROR(EINVAL);
1473  }
1474 
1475  if (ctx->encode_config.frameIntervalP < 5)
1476  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1477  }
1478 #endif
1479 
1480 #ifdef NVENC_HAVE_TIME_CODE
1481  if (ctx->s12m_tc)
1482  h264->enableTimeCode = 1;
1483 #endif
1484 
1485  return 0;
1486 }
1487 
1489 {
1490  NvencContext *ctx = avctx->priv_data;
1491  NV_ENC_CONFIG *cc = &ctx->encode_config;
1492  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1493  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1494 
1495  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1496 
1497  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1498  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1499  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1500  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1501  vui->videoFullRangeFlag = 0;
1502  } else {
1503  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1504  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1505  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1506  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1507  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1508  }
1509 
1510  vui->colourDescriptionPresentFlag =
1511  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1512 
1513  vui->videoSignalTypePresentFlag =
1514  (vui->colourDescriptionPresentFlag
1515  || vui->videoFormat != 5
1516  || vui->videoFullRangeFlag != 0);
1517 
1518  if (ctx->max_slice_size > 0) {
1519  hevc->sliceMode = 1;
1520  hevc->sliceModeData = ctx->max_slice_size;
1521  } else {
1522  hevc->sliceMode = 3;
1523  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1524  }
1525 
1526  if (ctx->intra_refresh) {
1527  hevc->enableIntraRefresh = 1;
1528  hevc->intraRefreshPeriod = cc->gopLength;
1529  hevc->intraRefreshCnt = cc->gopLength - 1;
1530  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1531 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1532  hevc->outputRecoveryPointSEI = 1;
1533 #endif
1534 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1535  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1536 #endif
1537  }
1538 
1539 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1540  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1541  avctx->nb_decoded_side_data,
1543  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1544  avctx->nb_decoded_side_data,
1546 #endif
1547 
1548 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1549  if (ctx->constrained_encoding)
1550  hevc->enableConstrainedEncoding = 1;
1551 #endif
1552 
1553  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1554  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1555  hevc->outputAUD = ctx->aud;
1556 
1557  if (ctx->dpb_size >= 0) {
1558  /* 0 means "let the hardware decide" */
1559  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1560  }
1561 
1562  hevc->idrPeriod = cc->gopLength;
1563 
1564  if (IS_CBR(cc->rcParams.rateControlMode)) {
1565  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1566  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1567 
1568 #ifdef NVENC_HAVE_FILLER_DATA
1569  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1570 #endif
1571  }
1572 
1573  hevc->outputPictureTimingSEI = 1;
1574 
1575 #ifdef NVENC_HAVE_MVHEVC
1576  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1579  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1580 
1581  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1582  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1583 
1584  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1585  stereo3d->type != AV_STEREO3D_2D &&
1586  stereo3d->type != AV_STEREO3D_UNSPEC &&
1587  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1588  {
1589  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1590  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1591  }
1592  }
1593 #endif
1594 
1595  switch (ctx->profile) {
1597  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1598  avctx->profile = AV_PROFILE_HEVC_MAIN;
1599  break;
1601  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1603  break;
1605  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1606  avctx->profile = AV_PROFILE_HEVC_REXT;
1607  break;
1608 #ifdef NVENC_HAVE_MVHEVC
1609  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1610  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1612  ctx->multiview = 1;
1613 
1614  hevc->enableMVHEVC = 1;
1615  hevc->outputHevc3DReferenceDisplayInfo = 1;
1616 
1617  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1618  break;
1619 #endif
1620  }
1621 
1622  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1623  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1624  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1626  }
1627 
1628  // force setting profile as rext if input is yuv444 or yuv422
1629  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1630  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1631  avctx->profile = AV_PROFILE_HEVC_REXT;
1632  }
1633 
1634 #ifdef NVENC_HAVE_MVHEVC
1635  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1636  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1637  return AVERROR(EINVAL);
1638  }
1639 #endif
1640 
1641  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1642 
1643 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1644  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1645  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1646 #else
1647  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1648 #endif
1649 
1650  hevc->level = ctx->level;
1651 
1652  hevc->tier = ctx->tier;
1653 
1654 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1655  if (ctx->b_ref_mode >= 0)
1656  hevc->useBFramesAsRef = ctx->b_ref_mode;
1657 #endif
1658 
1659 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1660  hevc->numRefL0 = avctx->refs;
1661  hevc->numRefL1 = avctx->refs;
1662 #endif
1663 
1664 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1665  if (ctx->tf_level >= 0) {
1666  hevc->tfLevel = ctx->tf_level;
1667 
1668  switch (ctx->tf_level)
1669  {
1670  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1671  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1672  break;
1673  default:
1674  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1675  return AVERROR(EINVAL);
1676  }
1677 
1678  if (ctx->encode_config.frameIntervalP < 5)
1679  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1680  }
1681 #endif
1682 
1683  return 0;
1684 }
1685 
1686 #if CONFIG_AV1_NVENC_ENCODER
1687 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1688 {
1689  NvencContext *ctx = avctx->priv_data;
1690  NV_ENC_CONFIG *cc = &ctx->encode_config;
1691  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1692 
1693  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1694 
1695  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1696  av1->matrixCoefficients = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1697  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1698  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1699  av1->colorRange = 0;
1700  } else {
1701  av1->matrixCoefficients = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1702  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1703  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1704  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1705  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1706  }
1707 
1708  if (IS_YUV444(ctx->data_pix_fmt)) {
1709  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1710  return AVERROR(ENOTSUP);
1711  } else {
1712  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1713  avctx->profile = AV_PROFILE_AV1_MAIN;
1714  }
1715 
1716  if (ctx->dpb_size >= 0) {
1717  /* 0 means "let the hardware decide" */
1718  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1719  }
1720 
1721  if (ctx->intra_refresh) {
1722  av1->enableIntraRefresh = 1;
1723  av1->intraRefreshPeriod = cc->gopLength;
1724  av1->intraRefreshCnt = cc->gopLength - 1;
1725  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1726  }
1727 
1728  av1->idrPeriod = cc->gopLength;
1729 
1730  if (IS_CBR(cc->rcParams.rateControlMode)) {
1731  av1->enableBitstreamPadding = ctx->cbr_padding;
1732  }
1733 
1734  if (ctx->tile_cols >= 0)
1735  av1->numTileColumns = ctx->tile_cols;
1736  if (ctx->tile_rows >= 0)
1737  av1->numTileRows = ctx->tile_rows;
1738 
1739  av1->outputAnnexBFormat = 0;
1740 
1741  av1->level = ctx->level;
1742  av1->tier = ctx->tier;
1743 
1744  av1->enableTimingInfo = ctx->timing_info;
1745 
1746  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1747  av1->disableSeqHdr = 0;
1748  av1->repeatSeqHdr = 1;
1749 
1750  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1751 
1752 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1753  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1754  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1755 #else
1756  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1757  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1758 #endif
1759 
1760 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1761  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1762  avctx->nb_decoded_side_data,
1764  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1765  avctx->nb_decoded_side_data,
1767 #endif
1768 
1769  if (ctx->b_ref_mode >= 0)
1770  av1->useBFramesAsRef = ctx->b_ref_mode;
1771 
1772  av1->numFwdRefs = avctx->refs;
1773  av1->numBwdRefs = avctx->refs;
1774 
1775 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1776  if (ctx->tf_level >= 0) {
1777  av1->tfLevel = ctx->tf_level;
1778 
1779  switch (ctx->tf_level)
1780  {
1781  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1782  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1783  break;
1784  default:
1785  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1786  return AVERROR(EINVAL);
1787  }
1788 
1789  if (ctx->encode_config.frameIntervalP < 5)
1790  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1791  }
1792 #endif
1793 
1794  return 0;
1795 }
1796 #endif
1797 
1799 {
1800  switch (avctx->codec->id) {
1801  case AV_CODEC_ID_H264:
1802  return nvenc_setup_h264_config(avctx);
1803  case AV_CODEC_ID_HEVC:
1804  return nvenc_setup_hevc_config(avctx);
1805 #if CONFIG_AV1_NVENC_ENCODER
1806  case AV_CODEC_ID_AV1:
1807  return nvenc_setup_av1_config(avctx);
1808 #endif
1809  /* Earlier switch/case will return if unknown codec is passed. */
1810  }
1811 
1812  return 0;
1813 }
1814 
1815 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1816  int sw, sh;
1817 
1818  sw = avctx->width;
1819  sh = avctx->height;
1820 
1821 #if CONFIG_AV1_NVENC_ENCODER
1822  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1823  /* For AV1 we actually need to calculate the render width/height, not the dar */
1824  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1825  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1826  {
1827  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1828  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1829  } else {
1830  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1831  }
1832  }
1833 
1834  *dw = sw;
1835  *dh = sh;
1836  return;
1837  }
1838 #endif
1839 
1840  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1841  sw *= avctx->sample_aspect_ratio.num;
1842  sh *= avctx->sample_aspect_ratio.den;
1843  }
1844 
1845  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1846 }
1847 
1849 {
1850  NvencContext *ctx = avctx->priv_data;
1851  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1852  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1853 
1854  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1855  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1856  AVCPBProperties *cpb_props;
1857  int res = 0;
1858  int dw, dh;
1859 
1860  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1861  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1862 
1863  ctx->init_encode_params.encodeHeight = avctx->height;
1864  ctx->init_encode_params.encodeWidth = avctx->width;
1865 
1866  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1867 
1868  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1869  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1870 
1871 #ifdef NVENC_HAVE_NEW_PRESETS
1872  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1873 
1874  if (ctx->flags & NVENC_LOSSLESS)
1875  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1876  else if (ctx->flags & NVENC_LOWLATENCY)
1877  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1878 
1879  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1880  ctx->init_encode_params.encodeGUID,
1881  ctx->init_encode_params.presetGUID,
1882  ctx->init_encode_params.tuningInfo,
1883  &preset_config);
1884 #else
1885  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1886  ctx->init_encode_params.encodeGUID,
1887  ctx->init_encode_params.presetGUID,
1888  &preset_config);
1889 #endif
1890  if (nv_status != NV_ENC_SUCCESS)
1891  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1892 
1893  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1894 
1895  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1896 
1897  compute_dar(avctx, &dw, &dh);
1898  ctx->init_encode_params.darHeight = dh;
1899  ctx->init_encode_params.darWidth = dw;
1900 
1901  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1902  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1903  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1904  } else {
1905  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1906  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1907  }
1908 
1909 #ifdef NVENC_HAVE_UNIDIR_B
1910  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1911 #endif
1912 
1913  ctx->init_encode_params.enableEncodeAsync = 0;
1914  ctx->init_encode_params.enablePTD = 1;
1915 
1916 #ifdef NVENC_HAVE_NEW_PRESETS
1917  /* If lookahead isn't set from CLI, use value from preset.
1918  * P6 & P7 presets may enable lookahead for better quality.
1919  * */
1920  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1921  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1922 #endif
1923 
1924  if (ctx->weighted_pred == 1)
1925  ctx->init_encode_params.enableWeightedPrediction = 1;
1926 
1927 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1928  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1929 
1930  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1931  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1932  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1933  }
1934 #endif
1935 
1936  if (ctx->bluray_compat) {
1937  ctx->aud = 1;
1938  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1939  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1940  switch (avctx->codec->id) {
1941  case AV_CODEC_ID_H264:
1942  /* maximum level depends on used resolution */
1943  break;
1944  case AV_CODEC_ID_HEVC:
1945  ctx->level = NV_ENC_LEVEL_HEVC_51;
1946  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1947  break;
1948  }
1949  }
1950 
1951  if (avctx->gop_size > 0) {
1952  // only overwrite preset if a GOP size was selected as input
1953  ctx->encode_config.gopLength = avctx->gop_size;
1954  } else if (avctx->gop_size == 0) {
1955  ctx->encode_config.frameIntervalP = 0;
1956  ctx->encode_config.gopLength = 1;
1957  }
1958 
1959  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1960  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1961  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1962  }
1963 
1964  /* force to enable intra refresh */
1965  if(ctx->single_slice_intra_refresh)
1966  ctx->intra_refresh = 1;
1967 
1968  nvenc_recalc_surfaces(avctx);
1969 
1970  res = nvenc_setup_rate_control(avctx);
1971  if (res < 0)
1972  return res;
1973 
1974  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1975  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1976  } else {
1977  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1978  }
1979 
1980  res = nvenc_setup_codec_config(avctx);
1981  if (res)
1982  return res;
1983 
1984  res = nvenc_push_context(avctx);
1985  if (res < 0)
1986  return res;
1987 
1988  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1989  if (nv_status != NV_ENC_SUCCESS) {
1990  nvenc_pop_context(avctx);
1991  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1992  }
1993 
1994 #ifdef NVENC_HAVE_CUSTREAM_PTR
1995  if (ctx->cu_context) {
1996  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1997  if (nv_status != NV_ENC_SUCCESS) {
1998  nvenc_pop_context(avctx);
1999  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
2000  }
2001  }
2002 #endif
2003 
2004  res = nvenc_pop_context(avctx);
2005  if (res < 0)
2006  return res;
2007 
2008  if (ctx->encode_config.frameIntervalP > 1)
2009  avctx->has_b_frames = 2;
2010 
2011  if (ctx->encode_config.rcParams.averageBitRate > 0)
2012  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
2013 
2014  cpb_props = ff_encode_add_cpb_side_data(avctx);
2015  if (!cpb_props)
2016  return AVERROR(ENOMEM);
2017  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
2018  cpb_props->avg_bitrate = avctx->bit_rate;
2019  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
2020 
2021  return 0;
2022 }
2023 
2024 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
2025 {
2026  switch (pix_fmt) {
2027  case AV_PIX_FMT_YUV420P:
2028  return NV_ENC_BUFFER_FORMAT_YV12;
2029  case AV_PIX_FMT_NV12:
2030  return NV_ENC_BUFFER_FORMAT_NV12;
2031  case AV_PIX_FMT_P010:
2032  case AV_PIX_FMT_P016:
2033  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
2034  case AV_PIX_FMT_GBRP:
2035  case AV_PIX_FMT_YUV444P:
2036  return NV_ENC_BUFFER_FORMAT_YUV444;
2037  case AV_PIX_FMT_GBRP16:
2038  case AV_PIX_FMT_GBRP10MSB:
2039  case AV_PIX_FMT_YUV444P16:
2041  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2042  case AV_PIX_FMT_0RGB32:
2043  case AV_PIX_FMT_RGB32:
2044  return NV_ENC_BUFFER_FORMAT_ARGB;
2045  case AV_PIX_FMT_0BGR32:
2046  case AV_PIX_FMT_BGR32:
2047  return NV_ENC_BUFFER_FORMAT_ABGR;
2048  case AV_PIX_FMT_X2RGB10:
2049  return NV_ENC_BUFFER_FORMAT_ARGB10;
2050  case AV_PIX_FMT_X2BGR10:
2051  return NV_ENC_BUFFER_FORMAT_ABGR10;
2052 #ifdef NVENC_HAVE_422_SUPPORT
2053  case AV_PIX_FMT_NV16:
2054  return NV_ENC_BUFFER_FORMAT_NV16;
2055  case AV_PIX_FMT_P210:
2056  case AV_PIX_FMT_P216:
2057  return NV_ENC_BUFFER_FORMAT_P210;
2058 #endif
2059  default:
2060  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2061  }
2062 }
2063 
2064 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2065 {
2066  NvencContext *ctx = avctx->priv_data;
2067  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2068  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2069  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2070 
2071  NVENCSTATUS nv_status;
2072  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2073  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2074 
2075  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2076  ctx->surfaces[idx].in_ref = av_frame_alloc();
2077  if (!ctx->surfaces[idx].in_ref)
2078  return AVERROR(ENOMEM);
2079  } else {
2080  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2081 
2082  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2083  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2084  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2085  av_get_pix_fmt_name(ctx->data_pix_fmt));
2086  return AVERROR(EINVAL);
2087  }
2088 
2089  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2090  allocSurf.width = avctx->width;
2091  allocSurf.height = avctx->height;
2092  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2093 
2094  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2095  if (nv_status != NV_ENC_SUCCESS) {
2096  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2097  }
2098 
2099  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2100  ctx->surfaces[idx].width = allocSurf.width;
2101  ctx->surfaces[idx].height = allocSurf.height;
2102  }
2103 
2104  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2105  if (nv_status != NV_ENC_SUCCESS) {
2106  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2107  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2108  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2109  av_frame_free(&ctx->surfaces[idx].in_ref);
2110  return err;
2111  }
2112 
2113  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2114 
2115  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2116 
2117  return 0;
2118 }
2119 
2121 {
2122  NvencContext *ctx = avctx->priv_data;
2123  int i, res = 0, res2;
2124 
2125  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2126  if (!ctx->surfaces)
2127  return AVERROR(ENOMEM);
2128 
2129  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2130  if (!ctx->frame_data_array)
2131  return AVERROR(ENOMEM);
2132 
2133  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2134  sizeof(int64_t), 0);
2135  if (!ctx->timestamp_list)
2136  return AVERROR(ENOMEM);
2137 
2138  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2139  if (!ctx->unused_surface_queue)
2140  return AVERROR(ENOMEM);
2141 
2142  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2143  if (!ctx->output_surface_queue)
2144  return AVERROR(ENOMEM);
2145  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2146  if (!ctx->output_surface_ready_queue)
2147  return AVERROR(ENOMEM);
2148 
2149  res = nvenc_push_context(avctx);
2150  if (res < 0)
2151  return res;
2152 
2153  for (i = 0; i < ctx->nb_surfaces; i++) {
2154  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2155  goto fail;
2156  }
2157 
2158 fail:
2159  res2 = nvenc_pop_context(avctx);
2160  if (res2 < 0)
2161  return res2;
2162 
2163  return res;
2164 }
2165 
2167 {
2168  NvencContext *ctx = avctx->priv_data;
2169  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2170  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2171 
2172  NVENCSTATUS nv_status;
2173  uint32_t outSize = 0;
2174  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2175 
2176  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2177  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2178 
2179  payload.spsppsBuffer = tmpHeader;
2180  payload.inBufferSize = sizeof(tmpHeader);
2181  payload.outSPSPPSPayloadSize = &outSize;
2182 
2183  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2184  if (nv_status != NV_ENC_SUCCESS) {
2185  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2186  }
2187 
2188  avctx->extradata_size = outSize;
2190 
2191  if (!avctx->extradata) {
2192  return AVERROR(ENOMEM);
2193  }
2194 
2195  memcpy(avctx->extradata, tmpHeader, outSize);
2196 
2197  return 0;
2198 }
2199 
2201 {
2202  NvencContext *ctx = avctx->priv_data;
2203  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2204  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2205  int i, res;
2206 
2207  /* the encoder has to be flushed before it can be closed */
2208  if (ctx->nvencoder) {
2209  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2210  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2211 
2212  res = nvenc_push_context(avctx);
2213  if (res < 0)
2214  return res;
2215 
2216  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2217  }
2218 
2219  av_fifo_freep2(&ctx->timestamp_list);
2220  av_fifo_freep2(&ctx->output_surface_ready_queue);
2221  av_fifo_freep2(&ctx->output_surface_queue);
2222  av_fifo_freep2(&ctx->unused_surface_queue);
2223 
2224  if (ctx->frame_data_array) {
2225  for (i = 0; i < ctx->frame_data_array_nb; i++)
2226  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2227  av_freep(&ctx->frame_data_array);
2228  }
2229 
2230  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2231  for (i = 0; i < ctx->nb_registered_frames; i++) {
2232  if (ctx->registered_frames[i].mapped)
2233  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2234  if (ctx->registered_frames[i].regptr)
2235  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2236  }
2237  ctx->nb_registered_frames = 0;
2238  }
2239 
2240  if (ctx->surfaces) {
2241  for (i = 0; i < ctx->nb_surfaces; ++i) {
2242  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2243  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2244  av_frame_free(&ctx->surfaces[i].in_ref);
2245  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2246  }
2247  }
2248  av_freep(&ctx->surfaces);
2249  ctx->nb_surfaces = 0;
2250 
2251  av_frame_free(&ctx->frame);
2252 
2253  av_freep(&ctx->sei_data);
2254 
2255  if (ctx->nvencoder) {
2256  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2257 
2258  res = nvenc_pop_context(avctx);
2259  if (res < 0)
2260  return res;
2261  }
2262  ctx->nvencoder = NULL;
2263 
2264  if (ctx->cu_context_internal)
2265  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2266  ctx->cu_context = ctx->cu_context_internal = NULL;
2267 
2268 #if CONFIG_D3D11VA
2269  if (ctx->d3d11_device) {
2270  ID3D11Device_Release(ctx->d3d11_device);
2271  ctx->d3d11_device = NULL;
2272  }
2273 #endif
2274 
2275  nvenc_free_functions(&dl_fn->nvenc_dl);
2276  cuda_free_functions(&dl_fn->cuda_dl);
2277 
2278  dl_fn->nvenc_device_count = 0;
2279 
2280  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2281 
2282  return 0;
2283 }
2284 
2286 {
2287  NvencContext *ctx = avctx->priv_data;
2288  int ret;
2289 
2290  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2291  AVHWFramesContext *frames_ctx;
2292  if (!avctx->hw_frames_ctx) {
2293  av_log(avctx, AV_LOG_ERROR,
2294  "hw_frames_ctx must be set when using GPU frames as input\n");
2295  return AVERROR(EINVAL);
2296  }
2297  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2298  if (frames_ctx->format != avctx->pix_fmt) {
2299  av_log(avctx, AV_LOG_ERROR,
2300  "hw_frames_ctx must match the GPU frame type\n");
2301  return AVERROR(EINVAL);
2302  }
2303  ctx->data_pix_fmt = frames_ctx->sw_format;
2304  } else {
2305  ctx->data_pix_fmt = avctx->pix_fmt;
2306  }
2307 
2308  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2309  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2310  return AVERROR(EINVAL);
2311  }
2312 
2313  ctx->frame = av_frame_alloc();
2314  if (!ctx->frame)
2315  return AVERROR(ENOMEM);
2316 
2317  if ((ret = nvenc_load_libraries(avctx)) < 0)
2318  return ret;
2319 
2320  if ((ret = nvenc_setup_device(avctx)) < 0)
2321  return ret;
2322 
2323  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2324  return ret;
2325 
2326  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2327  return ret;
2328 
2329  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2330  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2331  return ret;
2332  }
2333 
2334  return 0;
2335 }
2336 
2338 {
2339  NvencSurface *tmp_surf;
2340 
2341  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2342  // queue empty
2343  return NULL;
2344 
2345  return tmp_surf;
2346 }
2347 
2348 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2349  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2350 {
2351  int dst_linesize[4] = {
2352  lock_buffer_params->pitch,
2353  lock_buffer_params->pitch,
2354  lock_buffer_params->pitch,
2355  lock_buffer_params->pitch
2356  };
2357  uint8_t *dst_data[4];
2358  int ret;
2359 
2360  if (frame->format == AV_PIX_FMT_YUV420P)
2361  dst_linesize[1] = dst_linesize[2] >>= 1;
2362 
2363  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2364  lock_buffer_params->bufferDataPtr, dst_linesize);
2365  if (ret < 0)
2366  return ret;
2367 
2368  if (frame->format == AV_PIX_FMT_YUV420P)
2369  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2370 
2371  av_image_copy2(dst_data, dst_linesize,
2372  frame->data, frame->linesize, frame->format,
2373  avctx->width, avctx->height);
2374 
2375  return 0;
2376 }
2377 
2379 {
2380  NvencContext *ctx = avctx->priv_data;
2381  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2382  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2383  NVENCSTATUS nv_status;
2384 
2385  int i, first_round;
2386 
2387  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2388  for (first_round = 1; first_round >= 0; first_round--) {
2389  for (i = 0; i < ctx->nb_registered_frames; i++) {
2390  if (!ctx->registered_frames[i].mapped) {
2391  if (ctx->registered_frames[i].regptr) {
2392  if (first_round)
2393  continue;
2394  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2395  if (nv_status != NV_ENC_SUCCESS)
2396  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2397  ctx->registered_frames[i].ptr = NULL;
2398  ctx->registered_frames[i].regptr = NULL;
2399  }
2400  return i;
2401  }
2402  }
2403  }
2404  } else {
2405  return ctx->nb_registered_frames++;
2406  }
2407 
2408  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2409  return AVERROR(ENOMEM);
2410 }
2411 
2413 {
2414  NvencContext *ctx = avctx->priv_data;
2415  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2416  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2417 
2418  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2419  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2420  int i, idx, ret;
2421 
2422  for (i = 0; i < ctx->nb_registered_frames; i++) {
2423  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2424  return i;
2425  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2426  return i;
2427  }
2428 
2429  idx = nvenc_find_free_reg_resource(avctx);
2430  if (idx < 0)
2431  return idx;
2432 
2433  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2434  reg.width = frames_ctx->width;
2435  reg.height = frames_ctx->height;
2436  reg.pitch = frame->linesize[0];
2437  reg.resourceToRegister = frame->data[0];
2438 
2439  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2440  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2441  }
2442  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2443  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2444  reg.subResourceIndex = (intptr_t)frame->data[1];
2445  }
2446 
2447  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2448  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2449  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2450  av_get_pix_fmt_name(frames_ctx->sw_format));
2451  return AVERROR(EINVAL);
2452  }
2453 
2454  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2455  if (ret != NV_ENC_SUCCESS) {
2456  nvenc_print_error(avctx, ret, "Error registering an input resource");
2457  return AVERROR_UNKNOWN;
2458  }
2459 
2460  ctx->registered_frames[idx].ptr = frame->data[0];
2461  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2462  ctx->registered_frames[idx].regptr = reg.registeredResource;
2463  return idx;
2464 }
2465 
2467  NvencSurface *nvenc_frame)
2468 {
2469  NvencContext *ctx = avctx->priv_data;
2470  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2471  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2472 
2473  int res;
2474  NVENCSTATUS nv_status;
2475 
2476  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2477  int reg_idx = nvenc_register_frame(avctx, frame);
2478  if (reg_idx < 0) {
2479  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2480  return reg_idx;
2481  }
2482 
2483  res = av_frame_ref(nvenc_frame->in_ref, frame);
2484  if (res < 0)
2485  return res;
2486 
2487  if (!ctx->registered_frames[reg_idx].mapped) {
2488  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2489  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2490  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2491  if (nv_status != NV_ENC_SUCCESS) {
2492  av_frame_unref(nvenc_frame->in_ref);
2493  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2494  }
2495  }
2496 
2497  ctx->registered_frames[reg_idx].mapped += 1;
2498 
2499  nvenc_frame->reg_idx = reg_idx;
2500  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2501  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2502  nvenc_frame->pitch = frame->linesize[0];
2503 
2504  return 0;
2505  } else {
2506  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2507 
2508  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2509  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2510 
2511  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2512  if (nv_status != NV_ENC_SUCCESS) {
2513  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2514  }
2515 
2516  nvenc_frame->pitch = lockBufferParams.pitch;
2517  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2518 
2519  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2520  if (nv_status != NV_ENC_SUCCESS) {
2521  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2522  }
2523 
2524  return res;
2525  }
2526 }
2527 
2528 #ifdef NVENC_HAVE_TIME_CODE
2529 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2530 {
2532 
2533  if (sd) {
2534  uint32_t *tc = (uint32_t*)sd->data;
2535  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2536 
2537  switch (cnt) {
2538  case 0:
2539  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2540  time_code->skipClockTimestampInsertion = 1;
2541  break;
2542  case 2:
2543  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2544  break;
2545  case 3:
2546  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2547  break;
2548  default:
2549  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2550  break;
2551  }
2552 
2553  for (int i = 0; i < cnt; i++) {
2554  unsigned hh, mm, ss, ff, drop;
2555  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2556 
2557 #ifdef NVENC_NEW_COUNTING_TYPE
2558  time_code->clockTimestamp[i].countingTypeLSB = 0;
2559  time_code->clockTimestamp[i].countingTypeMSB = 0;
2560 #else
2561  time_code->clockTimestamp[i].countingType = 0;
2562 #endif
2563  time_code->clockTimestamp[i].discontinuityFlag = 0;
2564  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2565  time_code->clockTimestamp[i].nFrames = ff;
2566  time_code->clockTimestamp[i].secondsValue = ss;
2567  time_code->clockTimestamp[i].minutesValue = mm;
2568  time_code->clockTimestamp[i].hoursValue = hh;
2569  time_code->clockTimestamp[i].timeOffset = 0;
2570  }
2571  } else {
2572  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2573  time_code->skipClockTimestampInsertion = 1;
2574  }
2575 }
2576 #endif
2577 
2579  NV_ENC_PIC_PARAMS *params,
2580  NV_ENC_SEI_PAYLOAD *sei_data,
2581  int sei_count)
2582 {
2583  NvencContext *ctx = avctx->priv_data;
2584 
2585  switch (avctx->codec->id) {
2586  case AV_CODEC_ID_H264:
2587  params->codecPicParams.h264PicParams.sliceMode =
2588  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2589  params->codecPicParams.h264PicParams.sliceModeData =
2590  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2591  if (sei_count > 0) {
2592  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2593  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2594  }
2595 
2596 #ifdef NVENC_HAVE_TIME_CODE
2597  if (ctx->s12m_tc)
2598  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2599 #endif
2600 
2601  break;
2602  case AV_CODEC_ID_HEVC:
2603  params->codecPicParams.hevcPicParams.sliceMode =
2604  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2605  params->codecPicParams.hevcPicParams.sliceModeData =
2606  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2607  if (sei_count > 0) {
2608  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2609  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2610  }
2611 
2612  break;
2613 #if CONFIG_AV1_NVENC_ENCODER
2614  case AV_CODEC_ID_AV1:
2615  params->codecPicParams.av1PicParams.numTileColumns =
2616  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2617  params->codecPicParams.av1PicParams.numTileRows =
2618  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2619  if (sei_count > 0) {
2620  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2621  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2622  }
2623 
2624  break;
2625 #endif
2626  }
2627 }
2628 
2629 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2630 {
2631  av_fifo_write(queue, &timestamp, 1);
2632 }
2633 
2635 {
2636  int64_t timestamp = AV_NOPTS_VALUE;
2637  // The following call might fail if the queue is empty.
2638  av_fifo_read(queue, &timestamp, 1);
2639 
2640  return timestamp;
2641 }
2642 
2643 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2644 {
2645  int64_t timestamp = AV_NOPTS_VALUE;
2646  av_fifo_peek(queue, &timestamp, 1, index);
2647 
2648  return timestamp;
2649 }
2650 
2652  NV_ENC_LOCK_BITSTREAM *params,
2653  AVPacket *pkt)
2654 {
2655  NvencContext *ctx = avctx->priv_data;
2656  unsigned int delay;
2657  int64_t delay_time;
2658 
2659  pkt->pts = params->outputTimeStamp;
2660 
2661  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2662  pkt->dts = pkt->pts;
2663  return 0;
2664  }
2665 
2666  // This can be more than necessary, but we don't know the real reorder delay.
2667  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2668 #ifdef NVENC_HAVE_MVHEVC
2669  delay *= ctx->multiview ? 2 : 1;
2670 #endif
2671  if (ctx->output_frame_num >= delay) {
2672  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2673  ctx->output_frame_num++;
2674  return 0;
2675  }
2676 
2677  delay_time = ctx->initial_delay_time;
2678  if (!delay_time) {
2679  int64_t t1, t2, t3;
2680  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2681  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2682  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2683 
2684  if (t1 != AV_NOPTS_VALUE) {
2685  delay_time = t1 - t2;
2686  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2687  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2688  avctx->time_base);
2689  } else if (t3 != AV_NOPTS_VALUE) {
2690  delay_time = delay * (t3 - t2);
2691  } else {
2692  delay_time = delay;
2693  }
2694  ctx->initial_delay_time = delay_time;
2695  }
2696 
2697  /* The following method is simple, but doesn't guarantee monotonic with VFR
2698  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2699  *
2700  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2701  */
2702  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2703  ctx->output_frame_num++;
2704 
2705  return 0;
2706 }
2707 
2708 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2709 {
2710  NvencContext *ctx = avctx->priv_data;
2711  int res = 0;
2712 
2713  int idx = ctx->frame_data_array_pos;
2714  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2715 
2716  // in case the encoder got reconfigured, there might be leftovers
2718 
2719  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2722  return AVERROR(ENOMEM);
2723  }
2724 
2725  frame_data->duration = frame->duration;
2726  frame_data->frame_opaque = frame->opaque;
2727 
2728  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2729  pic_params->inputDuration = idx;
2730 
2731  return res;
2732 }
2733 
2734 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2735 {
2736  NvencContext *ctx = avctx->priv_data;
2737  int res = 0;
2738 
2739  int idx = lock_params->outputDuration;
2740  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2741 
2743 
2744  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2748  }
2749 
2751 
2752  return res;
2753 }
2754 
2756 {
2757  NvencContext *ctx = avctx->priv_data;
2758  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2759  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2760 
2761  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2762  NVENCSTATUS nv_status;
2763  int res = 0;
2764 
2765  enum AVPictureType pict_type;
2766 
2767  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2768 
2769  lock_params.doNotWait = 0;
2770  lock_params.outputBitstream = tmpoutsurf->output_surface;
2771 
2772  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2773  if (nv_status != NV_ENC_SUCCESS) {
2774  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2775  goto error;
2776  }
2777 
2778  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2779 
2780  if (res < 0) {
2781  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2782  goto error;
2783  }
2784 
2785  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2786 
2787  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2788  if (nv_status != NV_ENC_SUCCESS) {
2789  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2790  goto error;
2791  }
2792 
2793 
2794  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2795  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2796  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2797  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2798  if (nv_status != NV_ENC_SUCCESS) {
2799  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2800  goto error;
2801  }
2802  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2803  res = AVERROR_BUG;
2804  goto error;
2805  }
2806 
2807  av_frame_unref(tmpoutsurf->in_ref);
2808 
2809  tmpoutsurf->input_surface = NULL;
2810  }
2811 
2812  switch (lock_params.pictureType) {
2813  case NV_ENC_PIC_TYPE_IDR:
2816  case NV_ENC_PIC_TYPE_I:
2817  pict_type = AV_PICTURE_TYPE_I;
2818  break;
2819  case NV_ENC_PIC_TYPE_P:
2820  pict_type = AV_PICTURE_TYPE_P;
2821  break;
2822  case NV_ENC_PIC_TYPE_B:
2823  pict_type = AV_PICTURE_TYPE_B;
2824  break;
2825  case NV_ENC_PIC_TYPE_BI:
2826  pict_type = AV_PICTURE_TYPE_BI;
2827  break;
2828  default:
2829  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2830  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2831  res = AVERROR_EXTERNAL;
2832  goto error;
2833  }
2834 
2836  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2837 
2838  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2839  if (res < 0)
2840  goto error2;
2841 
2842  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2843  if (res < 0)
2844  goto error2;
2845 
2846  return 0;
2847 
2848 error:
2849  timestamp_queue_dequeue(ctx->timestamp_list);
2850 
2851 error2:
2852  return res;
2853 }
2854 
2855 static int output_ready(AVCodecContext *avctx, int flush)
2856 {
2857  NvencContext *ctx = avctx->priv_data;
2858  int nb_ready, nb_pending;
2859 
2860  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2861  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2862  if (flush)
2863  return nb_ready > 0;
2864  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2865 }
2866 
2868 {
2869  NvencContext *ctx = avctx->priv_data;
2870  int sei_count = 0;
2871  int i, res;
2872 
2874  void *a53_data = NULL;
2875  size_t a53_size = 0;
2876 
2877  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2878  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2879  }
2880 
2881  if (a53_data) {
2882  void *tmp = av_fast_realloc(ctx->sei_data,
2883  &ctx->sei_data_size,
2884  (sei_count + 1) * sizeof(*ctx->sei_data));
2885  if (!tmp) {
2886  av_free(a53_data);
2887  res = AVERROR(ENOMEM);
2888  goto error;
2889  } else {
2890  ctx->sei_data = tmp;
2891  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2892  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2893 
2894 #if CONFIG_AV1_NVENC_ENCODER
2895  if (avctx->codec->id == AV_CODEC_ID_AV1)
2896  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2897  else
2898 #endif
2899  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2900 
2901  sei_count++;
2902  }
2903  }
2904  }
2905 
2907  void *tc_data = NULL;
2908  size_t tc_size = 0;
2909 
2910  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2911  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2912  }
2913 
2914  if (tc_data) {
2915  void *tmp = av_fast_realloc(ctx->sei_data,
2916  &ctx->sei_data_size,
2917  (sei_count + 1) * sizeof(*ctx->sei_data));
2918  if (!tmp) {
2919  av_free(tc_data);
2920  res = AVERROR(ENOMEM);
2921  goto error;
2922  } else {
2923  ctx->sei_data = tmp;
2924  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2925  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2926 
2927 #if CONFIG_AV1_NVENC_ENCODER
2928  if (avctx->codec->id == AV_CODEC_ID_AV1)
2929  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2930  else
2931 #endif
2932  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2933 
2934  sei_count++;
2935  }
2936  }
2937  }
2938 
2939  if (!ctx->udu_sei)
2940  return sei_count;
2941 
2942  for (i = 0; i < frame->nb_side_data; i++) {
2943  AVFrameSideData *side_data = frame->side_data[i];
2944  void *tmp;
2945 
2946  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2947  continue;
2948 
2949  tmp = av_fast_realloc(ctx->sei_data,
2950  &ctx->sei_data_size,
2951  (sei_count + 1) * sizeof(*ctx->sei_data));
2952  if (!tmp) {
2953  res = AVERROR(ENOMEM);
2954  goto error;
2955  } else {
2956  ctx->sei_data = tmp;
2957  ctx->sei_data[sei_count].payloadSize = side_data->size;
2958  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2959  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2960 
2961  if (!ctx->sei_data[sei_count].payload) {
2962  res = AVERROR(ENOMEM);
2963  goto error;
2964  }
2965 
2966  sei_count++;
2967  }
2968  }
2969 
2970  return sei_count;
2971 
2972 error:
2973  for (i = 0; i < sei_count; i++)
2974  av_freep(&(ctx->sei_data[i].payload));
2975 
2976  return res;
2977 }
2978 
2979 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2980 {
2981  NvencContext *ctx = avctx->priv_data;
2982  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2983  NVENCSTATUS ret;
2984 
2985  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2986  int needs_reconfig = 0;
2987  int needs_encode_config = 0;
2988  int reconfig_bitrate = 0, reconfig_dar = 0;
2989  int dw, dh;
2990 
2991  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2992  params.reInitEncodeParams = ctx->init_encode_params;
2993 
2994  compute_dar(avctx, &dw, &dh);
2995  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2996  av_log(avctx, AV_LOG_VERBOSE,
2997  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2998  ctx->init_encode_params.darWidth,
2999  ctx->init_encode_params.darHeight, dw, dh);
3000 
3001  params.reInitEncodeParams.darHeight = dh;
3002  params.reInitEncodeParams.darWidth = dw;
3003 
3004  needs_reconfig = 1;
3005  reconfig_dar = 1;
3006  }
3007 
3008  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
3009  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
3010  av_log(avctx, AV_LOG_VERBOSE,
3011  "avg bitrate change: %d -> %d\n",
3012  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
3013  (uint32_t)avctx->bit_rate);
3014 
3015  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
3016  reconfig_bitrate = 1;
3017  }
3018 
3019  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
3020  av_log(avctx, AV_LOG_VERBOSE,
3021  "max bitrate change: %d -> %d\n",
3022  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
3023  (uint32_t)avctx->rc_max_rate);
3024 
3025  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
3026  reconfig_bitrate = 1;
3027  }
3028 
3029  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
3030  av_log(avctx, AV_LOG_VERBOSE,
3031  "vbv buffer size change: %d -> %d\n",
3032  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
3033  avctx->rc_buffer_size);
3034 
3035  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
3036  reconfig_bitrate = 1;
3037  }
3038 
3039  if (reconfig_bitrate) {
3040  params.resetEncoder = 1;
3041  params.forceIDR = 1;
3042 
3043  needs_encode_config = 1;
3044  needs_reconfig = 1;
3045  }
3046  }
3047 
3048  if (!needs_encode_config)
3049  params.reInitEncodeParams.encodeConfig = NULL;
3050 
3051  if (needs_reconfig) {
3052  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3053  if (ret != NV_ENC_SUCCESS) {
3054  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3055  } else {
3056  if (reconfig_dar) {
3057  ctx->init_encode_params.darHeight = dh;
3058  ctx->init_encode_params.darWidth = dw;
3059  }
3060 
3061  if (reconfig_bitrate) {
3062  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3063  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3064  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3065  }
3066 
3067  }
3068  }
3069 }
3070 
3071 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3072 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3073  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3074 {
3075  NvencContext *ctx = avctx->priv_data;
3076 
3077  if (ctx->mdm || ctx->cll) {
3080  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3081  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3082  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3083 
3084  if (!sd_mdm)
3085  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3086  avctx->nb_decoded_side_data,
3088  if (!sd_cll)
3089  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3090  avctx->nb_decoded_side_data,
3092 
3093  if (sd_mdm) {
3095 
3096  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3097  mdm->display_primaries[0][0].den);
3098  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3099  mdm->display_primaries[0][1].den);
3100  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3101  mdm->display_primaries[1][0].den);
3102  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3103  mdm->display_primaries[1][1].den);
3104  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3105  mdm->display_primaries[2][0].den);
3106  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3107  mdm->display_primaries[2][1].den);
3108  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3109  mdm->white_point[0].den);
3110  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3111  mdm->white_point[1].den);
3112  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3113  mdm->max_luminance.den);
3114  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3115  mdm->min_luminance.den);
3116 
3117  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3118  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3119  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3120  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3121  else
3122  return AVERROR_BUG;
3123  }
3124  if (sd_cll) {
3125  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3126 
3127  content_light_level->maxContentLightLevel = cll->MaxCLL;
3128  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3129 
3130  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3131  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3132  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3133  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3134  else
3135  return AVERROR_BUG;
3136  }
3137  }
3138 
3139  return 0;
3140 }
3141 #endif
3142 
3143 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3144 {
3145  NVENCSTATUS nv_status;
3146  NvencSurface *tmp_out_surf, *in_surf;
3147  int res, res2;
3148  int sei_count = 0;
3149  int i;
3150 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3151  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3152  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3153 #endif
3154 #ifdef NVENC_HAVE_MVHEVC
3155  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3156 #endif
3157 
3158  NvencContext *ctx = avctx->priv_data;
3159  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3160  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3161 
3162  NV_ENC_PIC_PARAMS pic_params = { 0 };
3163  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3164 
3165  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3166  return AVERROR(EINVAL);
3167 
3168  if (frame && frame->buf[0]) {
3169  in_surf = get_free_frame(ctx);
3170  if (!in_surf)
3171  return AVERROR(EAGAIN);
3172 
3173  res = nvenc_push_context(avctx);
3174  if (res < 0)
3175  return res;
3176 
3177  reconfig_encoder(avctx, frame);
3178 
3179  res = nvenc_upload_frame(avctx, frame, in_surf);
3180 
3181  res2 = nvenc_pop_context(avctx);
3182  if (res2 < 0)
3183  return res2;
3184 
3185  if (res)
3186  return res;
3187 
3188  pic_params.inputBuffer = in_surf->input_surface;
3189  pic_params.bufferFmt = in_surf->format;
3190  pic_params.inputWidth = in_surf->width;
3191  pic_params.inputHeight = in_surf->height;
3192  pic_params.inputPitch = in_surf->pitch;
3193  pic_params.outputBitstream = in_surf->output_surface;
3194 
3195  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3196  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3197  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3198  else
3199  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3200  } else {
3201  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3202  }
3203 
3204  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3205  pic_params.encodePicFlags =
3206  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3207  } else {
3208  pic_params.encodePicFlags = 0;
3209  }
3210 
3211  pic_params.frameIdx = ctx->frame_idx_counter++;
3212  pic_params.inputTimeStamp = frame->pts;
3213 
3214  if (ctx->extra_sei) {
3215  res = prepare_sei_data_array(avctx, frame);
3216  if (res < 0)
3217  return res;
3218  sei_count = res;
3219  }
3220 
3221 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3222  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3223  if (res < 0)
3224  return res;
3225 #endif
3226 
3227 #ifdef NVENC_HAVE_MVHEVC
3228  if (ctx->multiview) {
3231 
3232  if (sd_view_id)
3233  ctx->next_view_id = *(int*)sd_view_id->data;
3234 
3235  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3236 
3237  if (sd_tdrdi) {
3239 
3240  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3241  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3242  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3243 
3244  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3245 
3246  for (i = 0; i < tdrdi->num_ref_displays &&
3247  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3248  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3249  ref_disp_info.leftViewId[i] = display->left_view_id;
3250  ref_disp_info.rightViewId[i] = display->right_view_id;
3251  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3252  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3253  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3254  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3255  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3256  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3257  }
3258 
3259  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3260  ctx->display_sei_sent = 1;
3261  } else if (!ctx->display_sei_sent) {
3262  ref_disp_info.precRefDisplayWidth = 31;
3263  ref_disp_info.leftViewId[0] = 0;
3264  ref_disp_info.rightViewId[0] = 1;
3265 
3266  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3267  ctx->display_sei_sent = 1;
3268  }
3269 
3270  ctx->next_view_id = !ctx->next_view_id;
3271  }
3272 #endif
3273 
3274  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3275  if (res < 0)
3276  return res;
3277 
3278  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3279  } else {
3280  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3281  }
3282 
3283  res = nvenc_push_context(avctx);
3284  if (res < 0)
3285  return res;
3286 
3287  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3288 
3289  for (i = 0; i < sei_count; i++)
3290  av_freep(&(ctx->sei_data[i].payload));
3291 
3292  res = nvenc_pop_context(avctx);
3293  if (res < 0)
3294  return res;
3295 
3296  if (nv_status != NV_ENC_SUCCESS &&
3297  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3298  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3299 
3300  if (frame && frame->buf[0]) {
3301  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3302 
3304  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3305  }
3306 
3307  /* all the pending buffers are now ready for output */
3308  if (nv_status == NV_ENC_SUCCESS) {
3309  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3310  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3311  }
3312 
3313  return 0;
3314 }
3315 
3317 {
3318  NvencSurface *tmp_out_surf;
3319  int res, res2;
3320 
3321  NvencContext *ctx = avctx->priv_data;
3322 
3323  AVFrame *frame = ctx->frame;
3324 
3325  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3326  return AVERROR(EINVAL);
3327 
3328  if (!frame->buf[0]) {
3329  res = ff_encode_get_frame(avctx, frame);
3330  if (res < 0 && res != AVERROR_EOF)
3331  return res;
3332  }
3333 
3334  res = nvenc_send_frame(avctx, frame);
3335  if (res < 0) {
3336  if (res != AVERROR(EAGAIN))
3337  return res;
3338  } else
3340 
3341  if (output_ready(avctx, avctx->internal->draining)) {
3342  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3343 
3344  res = nvenc_push_context(avctx);
3345  if (res < 0)
3346  return res;
3347 
3348  res = process_output_surface(avctx, pkt, tmp_out_surf);
3349 
3350  res2 = nvenc_pop_context(avctx);
3351  if (res2 < 0)
3352  return res2;
3353 
3354  if (res)
3355  return res;
3356 
3357  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3358  } else if (avctx->internal->draining) {
3359  return AVERROR_EOF;
3360  } else {
3361  return AVERROR(EAGAIN);
3362  }
3363 
3364  return 0;
3365 }
3366 
3368 {
3369  NvencContext *ctx = avctx->priv_data;
3370 
3371  nvenc_send_frame(avctx, NULL);
3372  av_fifo_reset2(ctx->timestamp_list);
3373  ctx->output_frame_num = 0;
3374  ctx->initial_delay_time = 0;
3375 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:85
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:88
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:205
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:201
level
uint8_t level
Definition: svq3.c:208
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:671
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1942
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:659
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:513
GUIDTuple
Definition: nvenc.c:200
GUIDTuple::flags
int flags
Definition: nvenc.c:202
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3456
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:203
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:396
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:200
AVPictureType
AVPictureType
Definition: avutil.h:276
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2855
NvencContext
Definition: nvenc.h:217
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1722
av_cold
#define av_cold
Definition: attributes.h:119
int64_t
long long int64_t
Definition: coverity.c:34
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:554
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:122
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:64
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2708
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:466
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:664
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:188
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2651
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:777
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:603
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:797
NvencFrameData
Definition: nvenc.h:132
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2979
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:207
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:701
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2643
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:59
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:212
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:899
NvencSurface
Definition: nvenc.h:119
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:621
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:187
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:180
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1259
nverr
NVENCSTATUS nverr
Definition: nvenc.c:133
NONE
#define NONE
Definition: vf_drawvg.c:262
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:1014
PRESET
#define PRESET(name,...)
Definition: nvenc.c:208
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:658
dummy
static int dummy
Definition: ffplay.c:3751
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3367
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:694
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1815
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:176
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:563
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:706
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2466
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:146
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:806
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:937
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:165
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:452
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:639
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:481
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:129
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1106
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:701
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:210
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:500
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2348
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:128
ff_encode_add_stats_side_data
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition: encode.c:947
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:264
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:498
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:63
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:52
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:657
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:324
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
to_nv_color_pri
#define to_nv_color_pri(n)
Definition: nvenc.c:348
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
P2
#define P2
Definition: cavsdsp.c:36
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:527
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:709
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2285
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1235
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:174
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:552
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1465
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:200
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1943
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:516
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:140
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
ctx
static AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2166
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2629
P1
#define P1
Definition: cavsdsp.c:37
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1288
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2634
av_mallocz
#define av_mallocz(s)
Definition: tableprint_vlc.h:31
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:628
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:143
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:282
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:126
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
AVCodecContext::codec_id
enum AVCodecID codec_id
Definition: avcodec.h:453
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:121
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1273
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:49
fail
#define fail
Definition: test.h:478
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:561
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:98
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:213
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:124
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:123
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:681
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:478
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:493
av_fallthrough
#define av_fallthrough
Definition: attributes.h:67
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2200
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:820
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:581
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:142
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:208
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1292
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:547
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:614
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:135
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:407
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1021
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:278
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:445
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:88
i
#define i(width, name, range_min, range_max)
Definition: cbs_h264.c:63
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:974
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2064
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:201
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:323
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:708
nvenc_errors
static const struct @229 nvenc_errors[]
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2412
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:477
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3316
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:602
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:511
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1028
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:609
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:189
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:620
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:622
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:297
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:616
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2337
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:790
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:419
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
av_malloc
#define av_malloc(s)
Definition: ops_asmgen.c:44
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:596
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:526
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2755
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:352
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1063
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:109
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:287
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2867
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:496
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:613
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1493
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:116
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:52
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:604
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:643
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:47
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:2024
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:604
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1471
NvencSurface::width
int width
Definition: nvenc.h:124
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:175
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:118
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:75
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1848
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:134
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:515
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:137
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:303
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AVCodecContext
main external API structure.
Definition: avcodec.h:443
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:105
NvencSurface::height
int height
Definition: nvenc.h:125
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1252
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1636
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2120
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:813
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:322
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:128
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2378
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:198
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2578
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:602
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:145
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:781
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:217
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:321
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1037
to_nv_color_matrix
#define to_nv_color_matrix(n)
Definition: nvenc.c:347
DEFAULT
#define DEFAULT
Definition: avdct.c:30
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:580
to_nv_color_trc
#define to_nv_color_trc(n)
Definition: nvenc.c:349
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:470
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:783
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1190
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:604
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:568
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:199
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:916
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:183
pkt
static AVPacket * pkt
Definition: demux_decode.c:55
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1798
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:628
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1488
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3143
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3376
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2734