23 #if HAVE_GETAUXVAL || HAVE_ELF_AUX_INFO
27 #define HWCAP_AARCH64_ASIMDDP (1 << 20)
28 #define HWCAP_AARCH64_SVE (1 << 22)
29 #define HWCAP2_AARCH64_SVE2 (1 << 1)
30 #define HWCAP2_AARCH64_I8MM (1 << 13)
31 #define HWCAP2_AARCH64_SME (1 << 23)
40 if (hwcap & HWCAP_AARCH64_ASIMDDP)
42 if (hwcap & HWCAP_AARCH64_SVE)
44 if (hwcap2 & HWCAP2_AARCH64_SVE2)
46 if (hwcap2 & HWCAP2_AARCH64_I8MM)
48 if (hwcap2 & HWCAP2_AARCH64_SME)
54 #elif defined(__APPLE__) && HAVE_SYSCTLBYNAME
55 #include <sys/sysctl.h>
57 static int have_feature(
const char *feature) {
69 if (have_feature(
"hw.optional.arm.FEAT_DotProd"))
71 if (have_feature(
"hw.optional.arm.FEAT_I8MM"))
73 if (have_feature(
"hw.optional.arm.FEAT_SME"))
79 #elif defined(__OpenBSD__)
80 #include <machine/armreg.h>
81 #include <machine/cpu.h>
82 #include <sys/types.h>
83 #include <sys/sysctl.h>
89 #ifdef CPU_ID_AA64ISAR0
96 mib[1] = CPU_ID_AA64ISAR0;
98 if (sysctl(mib, 2, &isar0, &
len,
NULL, 0) != -1) {
99 if (ID_AA64ISAR0_DP(isar0) >= ID_AA64ISAR0_DP_IMPL)
103 mib[0] = CTL_MACHDEP;
104 mib[1] = CPU_ID_AA64ISAR1;
106 if (sysctl(mib, 2, &isar1, &
len,
NULL, 0) != -1) {
107 #ifdef ID_AA64ISAR1_I8MM_IMPL
108 if (ID_AA64ISAR1_I8MM(isar1) >= ID_AA64ISAR1_I8MM_IMPL)
117 #elif defined(_WIN32)
123 #ifdef PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE
124 if (IsProcessorFeaturePresent(PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE))
127 #ifdef PF_ARM_SVE_I8MM_INSTRUCTIONS_AVAILABLE
131 if (IsProcessorFeaturePresent(PF_ARM_SVE_I8MM_INSTRUCTIONS_AVAILABLE))
134 #ifdef PF_ARM_SVE_INSTRUCTIONS_AVAILABLE
135 if (IsProcessorFeaturePresent(PF_ARM_SVE_INSTRUCTIONS_AVAILABLE))
138 #ifdef PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE
139 if (IsProcessorFeaturePresent(PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE))
142 #ifdef PF_ARM_SME_INSTRUCTIONS_AVAILABLE
143 if (IsProcessorFeaturePresent(PF_ARM_SME_INSTRUCTIONS_AVAILABLE))
162 #ifdef __ARM_FEATURE_DOTPROD
165 #ifdef __ARM_FEATURE_MATMUL_INT8
168 #ifdef __ARM_FEATURE_SVE
171 #ifdef __ARM_FEATURE_SVE2
174 #ifdef __ARM_FEATURE_SME