22 #include <va/va_enc_hevc.h> 
   90                                                char *
data, 
size_t *data_len,
 
  104                "%zu < %zu.\n", *data_len,
 
  127                "type = %d.\n", 
header->nal_unit_type);
 
  135                                                    char *
data, 
size_t *data_len)
 
  169                                                 char *
data, 
size_t *data_len)
 
  195                                                 char *
data, 
size_t *data_len)
 
  215                 .nuh_temporal_id_plus1 = 1,
 
  233         sei->payload_count = 
i;
 
  247         *
type = VAEncPackedHeaderRawData;
 
  267     VAEncSequenceParameterBufferHEVC *vseq = 
ctx->codec_sequence_params;
 
  268     VAEncPictureParameterBufferHEVC  *vpic = 
ctx->codec_picture_params;
 
  273     memset(
vps, 0, 
sizeof(*
vps));
 
  274     memset(
sps, 0, 
sizeof(*
sps));
 
  275     memset(
pps, 0, 
sizeof(*
pps));
 
  280     if (
desc->nb_components == 1) {
 
  283         if (
desc->log2_chroma_w == 1 && 
desc->log2_chroma_h == 1) {
 
  285         } 
else if (
desc->log2_chroma_w == 1 && 
desc->log2_chroma_h == 0) {
 
  287         } 
else if (
desc->log2_chroma_w == 0 && 
desc->log2_chroma_h == 0) {
 
  291                    "%s is not supported.\n", 
desc->name);
 
  303         .nuh_temporal_id_plus1 = 1,
 
  306     vps->vps_video_parameter_set_id = 0;
 
  308     vps->vps_base_layer_internal_flag  = 1;
 
  309     vps->vps_base_layer_available_flag = 1;
 
  310     vps->vps_max_layers_minus1         = 0;
 
  311     vps->vps_max_sub_layers_minus1     = 0;
 
  312     vps->vps_temporal_id_nesting_flag  = 1;
 
  318     if (chroma_format == 1) {
 
  347                                     ctx->surface_width, 
ctx->surface_height,
 
  348                                     ctx->nb_slices, 1, 1,
 
  349                                     (
ctx->b_per_p > 0) + 1);
 
  355                    "any normal level; using level 8.5.\n");
 
  362     vps->vps_sub_layer_ordering_info_present_flag = 0;
 
  363     vps->vps_max_dec_pic_buffering_minus1[0]      = 
ctx->max_b_depth + 1;
 
  364     vps->vps_max_num_reorder_pics[0]              = 
ctx->max_b_depth;
 
  365     vps->vps_max_latency_increase_plus1[0]        = 0;
 
  367     vps->vps_max_layer_id             = 0;
 
  368     vps->vps_num_layer_sets_minus1    = 0;
 
  369     vps->layer_id_included_flag[0][0] = 1;
 
  371     vps->vps_timing_info_present_flag = 1;
 
  375         vps->vps_poc_proportional_to_timing_flag = 1;
 
  376         vps->vps_num_ticks_poc_diff_one_minus1   = 0;
 
  380         vps->vps_poc_proportional_to_timing_flag = 0;
 
  382     vps->vps_num_hrd_parameters = 0;
 
  390         .nuh_temporal_id_plus1 = 1,
 
  393     sps->sps_video_parameter_set_id = 
vps->vps_video_parameter_set_id;
 
  395     sps->sps_max_sub_layers_minus1    = 
vps->vps_max_sub_layers_minus1;
 
  396     sps->sps_temporal_id_nesting_flag = 
vps->vps_temporal_id_nesting_flag;
 
  398     sps->profile_tier_level = 
vps->profile_tier_level;
 
  400     sps->sps_seq_parameter_set_id = 0;
 
  402     sps->chroma_format_idc          = chroma_format;
 
  403     sps->separate_colour_plane_flag = 0;
 
  405     sps->pic_width_in_luma_samples  = 
ctx->surface_width;
 
  406     sps->pic_height_in_luma_samples = 
ctx->surface_height;
 
  408     if (avctx->
width  != 
ctx->surface_width ||
 
  410         sps->conformance_window_flag = 1;
 
  411         sps->conf_win_left_offset   = 0;
 
  412         sps->conf_win_right_offset  =
 
  413             (
ctx->surface_width - avctx->
width) >> 
desc->log2_chroma_w;
 
  414         sps->conf_win_top_offset    = 0;
 
  415         sps->conf_win_bottom_offset =
 
  416             (
ctx->surface_height - avctx->
height) >> 
desc->log2_chroma_h;
 
  418         sps->conformance_window_flag = 0;
 
  424     sps->log2_max_pic_order_cnt_lsb_minus4 = 8;
 
  426     sps->sps_sub_layer_ordering_info_present_flag =
 
  427         vps->vps_sub_layer_ordering_info_present_flag;
 
  428     for (
i = 0; 
i <= 
sps->sps_max_sub_layers_minus1; 
i++) {
 
  429         sps->sps_max_dec_pic_buffering_minus1[
i] =
 
  430             vps->vps_max_dec_pic_buffering_minus1[
i];
 
  431         sps->sps_max_num_reorder_pics[
i] =
 
  432             vps->vps_max_num_reorder_pics[
i];
 
  433         sps->sps_max_latency_increase_plus1[
i] =
 
  434             vps->vps_max_latency_increase_plus1[
i];
 
  441     sps->log2_min_luma_coding_block_size_minus3   = 0;
 
  442     sps->log2_diff_max_min_luma_coding_block_size = 2;
 
  444     sps->log2_min_luma_transform_block_size_minus2   = 0;
 
  445     sps->log2_diff_max_min_luma_transform_block_size = 3;
 
  447     sps->max_transform_hierarchy_depth_inter = 3;
 
  448     sps->max_transform_hierarchy_depth_intra = 3;
 
  450     sps->amp_enabled_flag = 1;
 
  452     sps->sample_adaptive_offset_enabled_flag = 0;
 
  453     sps->sps_temporal_mvp_enabled_flag       = 0;
 
  455     sps->pcm_enabled_flag = 0;
 
  460     sps->num_short_term_ref_pic_sets     = 0;
 
  461     sps->long_term_ref_pics_present_flag = 0;
 
  463     sps->vui_parameters_present_flag = 1;
 
  469             {   1,  1 }, {  12, 11 }, {  10, 11 }, {  16, 11 },
 
  470             {  40, 33 }, {  24, 11 }, {  20, 11 }, {  32, 11 },
 
  471             {  80, 33 }, {  18, 11 }, {  15, 11 }, {  64, 33 },
 
  472             { 160, 99 }, {   4,  3 }, {   3,  2 }, {   2,  1 },
 
  478             if (num == sar_idc[
i].num &&
 
  479                 den == sar_idc[
i].den) {
 
  545         .nuh_temporal_id_plus1 = 1,
 
  548     pps->pps_pic_parameter_set_id = 0;
 
  549     pps->pps_seq_parameter_set_id = 
sps->sps_seq_parameter_set_id;
 
  551     pps->num_ref_idx_l0_default_active_minus1 = 0;
 
  552     pps->num_ref_idx_l1_default_active_minus1 = 0;
 
  556     pps->cu_qp_delta_enabled_flag = (
ctx->va_rc_mode != VA_RC_CQP);
 
  557     pps->diff_cu_qp_delta_depth   = 0;
 
  559     pps->pps_loop_filter_across_slices_enabled_flag = 1;
 
  564     *vseq = (VAEncSequenceParameterBufferHEVC) {
 
  565         .general_profile_idc = 
vps->profile_tier_level.general_profile_idc,
 
  566         .general_level_idc   = 
vps->profile_tier_level.general_level_idc,
 
  567         .general_tier_flag   = 
vps->profile_tier_level.general_tier_flag,
 
  569         .intra_period     = 
ctx->gop_size,
 
  570         .intra_idr_period = 
ctx->gop_size,
 
  571         .ip_period        = 
ctx->b_per_p + 1,
 
  572         .bits_per_second  = 
ctx->va_bit_rate,
 
  574         .pic_width_in_luma_samples  = 
sps->pic_width_in_luma_samples,
 
  575         .pic_height_in_luma_samples = 
sps->pic_height_in_luma_samples,
 
  578             .chroma_format_idc             = 
sps->chroma_format_idc,
 
  579             .separate_colour_plane_flag    = 
sps->separate_colour_plane_flag,
 
  580             .bit_depth_luma_minus8         = 
sps->bit_depth_luma_minus8,
 
  581             .bit_depth_chroma_minus8       = 
sps->bit_depth_chroma_minus8,
 
  582             .scaling_list_enabled_flag     = 
sps->scaling_list_enabled_flag,
 
  583             .strong_intra_smoothing_enabled_flag =
 
  584                 sps->strong_intra_smoothing_enabled_flag,
 
  585             .amp_enabled_flag              = 
sps->amp_enabled_flag,
 
  586             .sample_adaptive_offset_enabled_flag =
 
  587                 sps->sample_adaptive_offset_enabled_flag,
 
  588             .pcm_enabled_flag              = 
sps->pcm_enabled_flag,
 
  589             .pcm_loop_filter_disabled_flag = 
sps->pcm_loop_filter_disabled_flag,
 
  590             .sps_temporal_mvp_enabled_flag = 
sps->sps_temporal_mvp_enabled_flag,
 
  593         .log2_min_luma_coding_block_size_minus3 =
 
  594             sps->log2_min_luma_coding_block_size_minus3,
 
  595         .log2_diff_max_min_luma_coding_block_size =
 
  596             sps->log2_diff_max_min_luma_coding_block_size,
 
  597         .log2_min_transform_block_size_minus2 =
 
  598             sps->log2_min_luma_transform_block_size_minus2,
 
  599         .log2_diff_max_min_transform_block_size =
 
  600             sps->log2_diff_max_min_luma_transform_block_size,
 
  601         .max_transform_hierarchy_depth_inter =
 
  602             sps->max_transform_hierarchy_depth_inter,
 
  603         .max_transform_hierarchy_depth_intra =
 
  604             sps->max_transform_hierarchy_depth_intra,
 
  606         .pcm_sample_bit_depth_luma_minus1 =
 
  607             sps->pcm_sample_bit_depth_luma_minus1,
 
  608         .pcm_sample_bit_depth_chroma_minus1 =
 
  609             sps->pcm_sample_bit_depth_chroma_minus1,
 
  610         .log2_min_pcm_luma_coding_block_size_minus3 =
 
  611             sps->log2_min_pcm_luma_coding_block_size_minus3,
 
  612         .log2_max_pcm_luma_coding_block_size_minus3 =
 
  613             sps->log2_min_pcm_luma_coding_block_size_minus3 +
 
  614             sps->log2_diff_max_min_pcm_luma_coding_block_size,
 
  616         .vui_parameters_present_flag = 0,
 
  619     *vpic = (VAEncPictureParameterBufferHEVC) {
 
  620         .decoded_curr_pic = {
 
  621             .picture_id = VA_INVALID_ID,
 
  622             .flags      = VA_PICTURE_HEVC_INVALID,
 
  625         .coded_buf = VA_INVALID_ID,
 
  627         .collocated_ref_pic_index = 0xff,
 
  631         .pic_init_qp            = 
pps->init_qp_minus26 + 26,
 
  632         .diff_cu_qp_delta_depth = 
pps->diff_cu_qp_delta_depth,
 
  633         .pps_cb_qp_offset       = 
pps->pps_cb_qp_offset,
 
  634         .pps_cr_qp_offset       = 
pps->pps_cr_qp_offset,
 
  636         .num_tile_columns_minus1 = 
pps->num_tile_columns_minus1,
 
  637         .num_tile_rows_minus1    = 
pps->num_tile_rows_minus1,
 
  639         .log2_parallel_merge_level_minus2 = 
pps->log2_parallel_merge_level_minus2,
 
  640         .ctu_max_bitsize_allowed          = 0,
 
  642         .num_ref_idx_l0_default_active_minus1 =
 
  643             pps->num_ref_idx_l0_default_active_minus1,
 
  644         .num_ref_idx_l1_default_active_minus1 =
 
  645             pps->num_ref_idx_l1_default_active_minus1,
 
  647         .slice_pic_parameter_set_id = 
pps->pps_pic_parameter_set_id,
 
  650             .sign_data_hiding_enabled_flag  = 
pps->sign_data_hiding_enabled_flag,
 
  651             .constrained_intra_pred_flag    = 
pps->constrained_intra_pred_flag,
 
  652             .transform_skip_enabled_flag    = 
pps->transform_skip_enabled_flag,
 
  653             .cu_qp_delta_enabled_flag       = 
pps->cu_qp_delta_enabled_flag,
 
  654             .weighted_pred_flag             = 
pps->weighted_pred_flag,
 
  655             .weighted_bipred_flag           = 
pps->weighted_bipred_flag,
 
  656             .transquant_bypass_enabled_flag = 
pps->transquant_bypass_enabled_flag,
 
  657             .tiles_enabled_flag             = 
pps->tiles_enabled_flag,
 
  658             .entropy_coding_sync_enabled_flag = 
pps->entropy_coding_sync_enabled_flag,
 
  659             .loop_filter_across_tiles_enabled_flag =
 
  660                 pps->loop_filter_across_tiles_enabled_flag,
 
  661             .scaling_list_data_present_flag = (
sps->sps_scaling_list_data_present_flag |
 
  662                                                pps->pps_scaling_list_data_present_flag),
 
  663             .screen_content_flag            = 0,
 
  664             .enable_gpu_weighted_prediction = 0,
 
  665             .no_output_of_prior_pics_flag   = 0,
 
  707             for (irap_ref = pic; irap_ref; irap_ref = irap_ref->
refs[1]) {
 
  730                 .nuh_temporal_id_plus1 = 1,
 
  757                 const int mapping[3] = {1, 2, 0};
 
  758                 const int chroma_den = 50000;
 
  759                 const int luma_den   = 10000;
 
  761                 for (
i = 0; 
i < 3; 
i++) {
 
  762                     const int j = mapping[
i];
 
  804             clli->max_pic_average_light_level = 
FFMIN(clm->
MaxFALL, 65535);
 
  810     vpic->decoded_curr_pic = (VAPictureHEVC) {
 
  821         href = 
ref->priv_data;
 
  823         vpic->reference_frames[
i] = (VAPictureHEVC) {
 
  824             .picture_id    = 
ref->recon_surface,
 
  827                       VA_PICTURE_HEVC_RPS_ST_CURR_BEFORE : 0) |
 
  829                       VA_PICTURE_HEVC_RPS_ST_CURR_AFTER  : 0),
 
  833         vpic->reference_frames[
i] = (VAPictureHEVC) {
 
  834             .picture_id = VA_INVALID_ID,
 
  835             .flags      = VA_PICTURE_HEVC_INVALID,
 
  845         vpic->pic_fields.bits.idr_pic_flag       = 1;
 
  846         vpic->pic_fields.bits.coding_type        = 1;
 
  847         vpic->pic_fields.bits.reference_pic_flag = 1;
 
  850         vpic->pic_fields.bits.idr_pic_flag       = 0;
 
  851         vpic->pic_fields.bits.coding_type        = 1;
 
  852         vpic->pic_fields.bits.reference_pic_flag = 1;
 
  855         vpic->pic_fields.bits.idr_pic_flag       = 0;
 
  856         vpic->pic_fields.bits.coding_type        = 2;
 
  857         vpic->pic_fields.bits.reference_pic_flag = 1;
 
  860         vpic->pic_fields.bits.idr_pic_flag       = 0;
 
  861         vpic->pic_fields.bits.coding_type        = 3;
 
  862         vpic->pic_fields.bits.reference_pic_flag = 0;
 
  887         .nuh_temporal_id_plus1 = 1,
 
  898         (1 << (
sps->log2_max_pic_order_cnt_lsb_minus4 + 4)) - 1;
 
  905         int i, j, poc, rps_pics;
 
  910         memset(rps, 0, 
sizeof(*rps));
 
  916             rps_used[rps_pics] = 1;
 
  920             if (pic->
dpb[
i] == pic)
 
  922             for (j = 0; j < pic->
nb_refs; j++) {
 
  926             if (j < pic->nb_refs)
 
  930             rps_used[rps_pics] = 0;
 
  934         for (
i = 1; 
i < rps_pics; 
i++) {
 
  935             for (j = 
i; j > 0; j--) {
 
  936                 if (rps_poc[j] > rps_poc[j - 1])
 
  939                 FFSWAP(
int, rps_poc[j],  rps_poc[j - 1]);
 
  940                 FFSWAP(
int, rps_used[j], rps_used[j - 1]);
 
  946         for (
i = 0; 
i < rps_pics; 
i++) {
 
  948                    rps_poc[
i], rps_used[
i]);
 
  952         for (
i = 0; 
i < rps_pics; 
i++) {
 
  960         for (j = 
i - 1; j >= 0; j--) {
 
  968         for (j = 
i; j < rps_pics; j++) {
 
  978             sps->sps_temporal_mvp_enabled_flag;
 
  990         sps->sample_adaptive_offset_enabled_flag;
 
 1000     *vslice = (VAEncSliceParameterBufferHEVC) {
 
 1022         .slice_fields.bits = {
 
 1026             .slice_temporal_mvp_enabled_flag =
 
 1030             .num_ref_idx_active_override_flag =
 
 1034             .slice_deblocking_filter_disabled_flag =
 
 1036             .slice_loop_filter_across_slices_enabled_flag =
 
 1043         vslice->ref_pic_list0[
i].picture_id = VA_INVALID_ID;
 
 1044         vslice->ref_pic_list0[
i].flags      = VA_PICTURE_HEVC_INVALID;
 
 1045         vslice->ref_pic_list1[
i].picture_id = VA_INVALID_ID;
 
 1046         vslice->ref_pic_list1[
i].flags      = VA_PICTURE_HEVC_INVALID;
 
 1054         vslice->ref_pic_list0[0] = vpic->reference_frames[0];
 
 1059         vslice->ref_pic_list1[0] = vpic->reference_frames[1];
 
 1075     if (
ctx->va_rc_mode == VA_RC_CQP) {
 
 1095                "%d / %d / %d for IDR- / P- / B-frames.\n",
 
 1105     ctx->roi_quant_range = 51 + 6 * (
ctx->profile->depth - 8);
 
 1113 #if VA_CHECK_VERSION(0, 37, 0) 
 1128     .default_quality       = 25,
 
 1134     .sequence_params_size  = 
sizeof(VAEncSequenceParameterBufferHEVC),
 
 1137     .picture_params_size   = 
sizeof(VAEncPictureParameterBufferHEVC),
 
 1140     .slice_params_size     = 
sizeof(VAEncSliceParameterBufferHEVC),
 
 1143     .sequence_header_type  = VAEncPackedHeaderSequence,
 
 1146     .slice_header_type     = VAEncPackedHeaderHEVC_Slice,
 
 1166                "in 8-bit unsigned integer.\n", avctx->
level);
 
 1170     ctx->desired_packed_headers =
 
 1171         VA_ENC_PACKED_HEADER_SEQUENCE | 
 
 1172         VA_ENC_PACKED_HEADER_SLICE    | 
 
 1173         VA_ENC_PACKED_HEADER_MISC;      
 
 1179     ctx->slice_block_width = 
ctx->slice_block_height = 32;
 
 1182         ctx->explicit_qp = priv->
qp;
 
 1197 #define OFFSET(x) offsetof(VAAPIEncodeH265Context, x) 
 1198 #define FLAGS (AV_OPT_FLAG_VIDEO_PARAM | AV_OPT_FLAG_ENCODING_PARAM) 
 1203     { 
"qp", 
"Constant QP (for P-frames; scaled by qfactor/qoffset for I/B)",
 
 1206     { 
"aud", 
"Include AUD",
 
 1209     { 
"profile", 
"Set profile (general_profile_idc)",
 
 1213 #define PROFILE(name, value)  name, NULL, 0, AV_OPT_TYPE_CONST, \ 
 1214       { .i64 = value }, 0, 0, FLAGS, "profile" 
 1220     { 
"tier", 
"Set tier (general_tier_flag)",
 
 1222       { .i64 = 0 }, 0, 1, 
FLAGS, 
"tier" },
 
 1224       { .i64 = 0 }, 0, 0, 
FLAGS, 
"tier" },
 
 1226       { .i64 = 1 }, 0, 0, 
FLAGS, 
"tier" },
 
 1228     { 
"level", 
"Set level (general_level_idc)",
 
 1232 #define LEVEL(name, value) name, NULL, 0, AV_OPT_TYPE_CONST, \ 
 1233       { .i64 = value }, 0, 0, FLAGS, "level" 
 1236     { 
LEVEL(
"2.1",  63) },
 
 1238     { 
LEVEL(
"3.1",  93) },
 
 1239     { 
LEVEL(
"4",   120) },
 
 1240     { 
LEVEL(
"4.1", 123) },
 
 1241     { 
LEVEL(
"5",   150) },
 
 1242     { 
LEVEL(
"5.1", 153) },
 
 1243     { 
LEVEL(
"5.2", 156) },
 
 1244     { 
LEVEL(
"6",   180) },
 
 1245     { 
LEVEL(
"6.1", 183) },
 
 1246     { 
LEVEL(
"6.2", 186) },
 
 1249     { 
"sei", 
"Set SEI to include",
 
 1252       0, INT_MAX, 
FLAGS, 
"sei" },
 
 1254       "Include HDR metadata for mastering display colour volume " 
 1255       "and content light level information",
 
 1258       INT_MIN, INT_MAX, 
FLAGS, 
"sei" },
 
 1267     { 
"i_qfactor",      
"1"   },
 
 1268     { 
"i_qoffset",      
"0"   },
 
 1269     { 
"b_qfactor",      
"6/5" },
 
 1270     { 
"b_qoffset",      
"0"   },
 
 1284     .
name           = 
"hevc_vaapi",
 
 1302     .wrapper_name   = 
"vaapi",