FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 
27 #include "libavutil/hwcontext.h"
28 #include "libavutil/cuda_check.h"
29 #include "libavutil/imgutils.h"
30 #include "libavutil/avassert.h"
31 #include "libavutil/mem.h"
32 #include "libavutil/pixdesc.h"
33 #include "internal.h"
34 
35 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
36 
37 #define NVENC_CAP 0x30
38 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
39  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
40  rc == NV_ENC_PARAMS_RC_CBR_HQ)
41 
47  AV_PIX_FMT_P016, // Truncated to 10bits
48  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
52 #if CONFIG_D3D11VA
54 #endif
56 };
57 
58 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
59  pix_fmt == AV_PIX_FMT_P016 || \
60  pix_fmt == AV_PIX_FMT_YUV444P16)
61 
62 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
63  pix_fmt == AV_PIX_FMT_YUV444P16)
64 
65 static const struct {
66  NVENCSTATUS nverr;
67  int averr;
68  const char *desc;
69 } nvenc_errors[] = {
70  { NV_ENC_SUCCESS, 0, "success" },
71  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
72  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
73  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
74  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
75  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
76  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
77  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
78  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
79  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
80  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
81  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
82  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
83  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
84  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
85  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
86  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
87  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
88  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
89  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
90  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
91  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
92  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
93  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
94  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
95  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
96 };
97 
98 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
99 {
100  int i;
101  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
102  if (nvenc_errors[i].nverr == err) {
103  if (desc)
104  *desc = nvenc_errors[i].desc;
105  return nvenc_errors[i].averr;
106  }
107  }
108  if (desc)
109  *desc = "unknown error";
110  return AVERROR_UNKNOWN;
111 }
112 
113 static int nvenc_print_error(void *log_ctx, NVENCSTATUS err,
114  const char *error_string)
115 {
116  const char *desc;
117  int ret;
118  ret = nvenc_map_error(err, &desc);
119  av_log(log_ctx, AV_LOG_ERROR, "%s: %s (%d)\n", error_string, desc, err);
120  return ret;
121 }
122 
124 {
125 #if NVENCAPI_CHECK_VERSION(9, 2)
126  const char *minver = "(unknown)";
127 #elif NVENCAPI_CHECK_VERSION(9, 1)
128 # if defined(_WIN32) || defined(__CYGWIN__)
129  const char *minver = "436.15";
130 # else
131  const char *minver = "435.21";
132 # endif
133 #elif NVENCAPI_CHECK_VERSION(9, 0)
134 # if defined(_WIN32) || defined(__CYGWIN__)
135  const char *minver = "418.81";
136 # else
137  const char *minver = "418.30";
138 # endif
139 #elif NVENCAPI_CHECK_VERSION(8, 2)
140 # if defined(_WIN32) || defined(__CYGWIN__)
141  const char *minver = "397.93";
142 # else
143  const char *minver = "396.24";
144 #endif
145 #elif NVENCAPI_CHECK_VERSION(8, 1)
146 # if defined(_WIN32) || defined(__CYGWIN__)
147  const char *minver = "390.77";
148 # else
149  const char *minver = "390.25";
150 # endif
151 #else
152 # if defined(_WIN32) || defined(__CYGWIN__)
153  const char *minver = "378.66";
154 # else
155  const char *minver = "378.13";
156 # endif
157 #endif
158  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
159 }
160 
162 {
163  NvencContext *ctx = avctx->priv_data;
164  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
165  NVENCSTATUS err;
166  uint32_t nvenc_max_ver;
167  int ret;
168 
169  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
170  if (ret < 0)
171  return ret;
172 
173  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
174  if (ret < 0) {
176  return ret;
177  }
178 
179  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
180  if (err != NV_ENC_SUCCESS)
181  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
182 
183  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
184 
185  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
186  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
187  "Required: %d.%d Found: %d.%d\n",
188  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
189  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
191  return AVERROR(ENOSYS);
192  }
193 
194  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
195 
196  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
197  if (err != NV_ENC_SUCCESS)
198  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
199 
200  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
201 
202  return 0;
203 }
204 
206 {
207  NvencContext *ctx = avctx->priv_data;
208  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
209 
210  if (ctx->d3d11_device)
211  return 0;
212 
213  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
214 }
215 
217 {
218  NvencContext *ctx = avctx->priv_data;
219  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
220  CUcontext dummy;
221 
222  if (ctx->d3d11_device)
223  return 0;
224 
225  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
226 }
227 
229 {
230  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
231  NvencContext *ctx = avctx->priv_data;
232  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
233  NVENCSTATUS ret;
234 
235  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
236  params.apiVersion = NVENCAPI_VERSION;
237  if (ctx->d3d11_device) {
238  params.device = ctx->d3d11_device;
239  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
240  } else {
241  params.device = ctx->cu_context;
242  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
243  }
244 
245  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
246  if (ret != NV_ENC_SUCCESS) {
247  ctx->nvencoder = NULL;
248  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
249  }
250 
251  return 0;
252 }
253 
255 {
256  NvencContext *ctx = avctx->priv_data;
257  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
258  int i, ret, count = 0;
259  GUID *guids = NULL;
260 
261  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
262 
263  if (ret != NV_ENC_SUCCESS || !count)
264  return AVERROR(ENOSYS);
265 
266  guids = av_malloc(count * sizeof(GUID));
267  if (!guids)
268  return AVERROR(ENOMEM);
269 
270  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
271  if (ret != NV_ENC_SUCCESS) {
272  ret = AVERROR(ENOSYS);
273  goto fail;
274  }
275 
276  ret = AVERROR(ENOSYS);
277  for (i = 0; i < count; i++) {
278  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
279  ret = 0;
280  break;
281  }
282  }
283 
284 fail:
285  av_free(guids);
286 
287  return ret;
288 }
289 
290 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
291 {
292  NvencContext *ctx = avctx->priv_data;
293  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
294  NV_ENC_CAPS_PARAM params = { 0 };
295  int ret, val = 0;
296 
297  params.version = NV_ENC_CAPS_PARAM_VER;
298  params.capsToQuery = cap;
299 
300  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
301 
302  if (ret == NV_ENC_SUCCESS)
303  return val;
304  return 0;
305 }
306 
308 {
309  NvencContext *ctx = avctx->priv_data;
310  int ret;
311 
313  if (ret < 0) {
314  av_log(avctx, AV_LOG_VERBOSE, "Codec not supported\n");
315  return ret;
316  }
317 
318  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
319  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
320  av_log(avctx, AV_LOG_VERBOSE, "YUV444P not supported\n");
321  return AVERROR(ENOSYS);
322  }
323 
324  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
325  if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
326  av_log(avctx, AV_LOG_VERBOSE, "Lossless encoding not supported\n");
327  return AVERROR(ENOSYS);
328  }
329 
330  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
331  if (ret < avctx->width) {
332  av_log(avctx, AV_LOG_VERBOSE, "Width %d exceeds %d\n",
333  avctx->width, ret);
334  return AVERROR(ENOSYS);
335  }
336 
337  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
338  if (ret < avctx->height) {
339  av_log(avctx, AV_LOG_VERBOSE, "Height %d exceeds %d\n",
340  avctx->height, ret);
341  return AVERROR(ENOSYS);
342  }
343 
344  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
345  if (ret < avctx->max_b_frames) {
346  av_log(avctx, AV_LOG_VERBOSE, "Max B-frames %d exceed %d\n",
347  avctx->max_b_frames, ret);
348 
349  return AVERROR(ENOSYS);
350  }
351 
352  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
353  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
354  av_log(avctx, AV_LOG_VERBOSE,
355  "Interlaced encoding is not supported. Supported level: %d\n",
356  ret);
357  return AVERROR(ENOSYS);
358  }
359 
360  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
361  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
362  av_log(avctx, AV_LOG_VERBOSE, "10 bit encode not supported\n");
363  return AVERROR(ENOSYS);
364  }
365 
366  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
367  if (ctx->rc_lookahead > 0 && ret <= 0) {
368  av_log(avctx, AV_LOG_VERBOSE, "RC lookahead not supported\n");
369  return AVERROR(ENOSYS);
370  }
371 
372  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
373  if (ctx->temporal_aq > 0 && ret <= 0) {
374  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ not supported\n");
375  return AVERROR(ENOSYS);
376  }
377 
378  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
379  if (ctx->weighted_pred > 0 && ret <= 0) {
380  av_log (avctx, AV_LOG_VERBOSE, "Weighted Prediction not supported\n");
381  return AVERROR(ENOSYS);
382  }
383 
384  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
385  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
386  av_log(avctx, AV_LOG_VERBOSE, "CABAC entropy coding not supported\n");
387  return AVERROR(ENOSYS);
388  }
389 
390 #ifdef NVENC_HAVE_BFRAME_REF_MODE
391  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
392  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1) {
393  av_log(avctx, AV_LOG_VERBOSE, "Each B frame as reference is not supported\n");
394  return AVERROR(ENOSYS);
395  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
396  av_log(avctx, AV_LOG_VERBOSE, "B frames as references are not supported\n");
397  return AVERROR(ENOSYS);
398  }
399 #else
400  if (ctx->b_ref_mode != 0) {
401  av_log(avctx, AV_LOG_VERBOSE, "B frames as references need SDK 8.1 at build time\n");
402  return AVERROR(ENOSYS);
403  }
404 #endif
405 
406  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
407 
408  return 0;
409 }
410 
411 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
412 {
413  NvencContext *ctx = avctx->priv_data;
414  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
415  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
416  char name[128] = { 0};
417  int major, minor, ret;
418  CUdevice cu_device;
419  int loglevel = AV_LOG_VERBOSE;
420 
421  if (ctx->device == LIST_DEVICES)
422  loglevel = AV_LOG_INFO;
423 
424  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
425  if (ret < 0)
426  return ret;
427 
428  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
429  if (ret < 0)
430  return ret;
431 
432  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
433  if (ret < 0)
434  return ret;
435 
436  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
437  if (((major << 4) | minor) < NVENC_CAP) {
438  av_log(avctx, loglevel, "does not support NVENC\n");
439  goto fail;
440  }
441 
442  if (ctx->device != idx && ctx->device != ANY_DEVICE)
443  return -1;
444 
445  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
446  if (ret < 0)
447  goto fail;
448 
449  ctx->cu_context = ctx->cu_context_internal;
450 
451  if ((ret = nvenc_pop_context(avctx)) < 0)
452  goto fail2;
453 
454  if ((ret = nvenc_open_session(avctx)) < 0)
455  goto fail2;
456 
457  if ((ret = nvenc_check_capabilities(avctx)) < 0)
458  goto fail3;
459 
460  av_log(avctx, loglevel, "supports NVENC\n");
461 
462  dl_fn->nvenc_device_count++;
463 
464  if (ctx->device == idx || ctx->device == ANY_DEVICE)
465  return 0;
466 
467 fail3:
468  if ((ret = nvenc_push_context(avctx)) < 0)
469  return ret;
470 
471  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
472  ctx->nvencoder = NULL;
473 
474  if ((ret = nvenc_pop_context(avctx)) < 0)
475  return ret;
476 
477 fail2:
478  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
479  ctx->cu_context_internal = NULL;
480 
481 fail:
482  return AVERROR(ENOSYS);
483 }
484 
486 {
487  NvencContext *ctx = avctx->priv_data;
488  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
489 
490  switch (avctx->codec->id) {
491  case AV_CODEC_ID_H264:
492  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
493  break;
494  case AV_CODEC_ID_HEVC:
495  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
496  break;
497  default:
498  return AVERROR_BUG;
499  }
500 
501  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
502  AVHWFramesContext *frames_ctx;
503  AVHWDeviceContext *hwdev_ctx;
504  AVCUDADeviceContext *cuda_device_hwctx = NULL;
505 #if CONFIG_D3D11VA
506  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
507 #endif
508  int ret;
509 
510  if (avctx->hw_frames_ctx) {
511  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
512  if (frames_ctx->format == AV_PIX_FMT_CUDA)
513  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
514 #if CONFIG_D3D11VA
515  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
516  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
517 #endif
518  else
519  return AVERROR(EINVAL);
520  } else if (avctx->hw_device_ctx) {
521  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
522  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
523  cuda_device_hwctx = hwdev_ctx->hwctx;
524 #if CONFIG_D3D11VA
525  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
526  d3d11_device_hwctx = hwdev_ctx->hwctx;
527 #endif
528  else
529  return AVERROR(EINVAL);
530  } else {
531  return AVERROR(EINVAL);
532  }
533 
534  if (cuda_device_hwctx) {
535  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
536  }
537 #if CONFIG_D3D11VA
538  else if (d3d11_device_hwctx) {
539  ctx->d3d11_device = d3d11_device_hwctx->device;
540  ID3D11Device_AddRef(ctx->d3d11_device);
541  }
542 #endif
543 
544  ret = nvenc_open_session(avctx);
545  if (ret < 0)
546  return ret;
547 
548  ret = nvenc_check_capabilities(avctx);
549  if (ret < 0) {
550  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
551  return ret;
552  }
553  } else {
554  int i, nb_devices = 0;
555 
556  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
557  return AVERROR_UNKNOWN;
558 
559  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
560  return AVERROR_UNKNOWN;
561 
562  if (!nb_devices) {
563  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
564  return AVERROR_EXTERNAL;
565  }
566 
567  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
568 
569  dl_fn->nvenc_device_count = 0;
570  for (i = 0; i < nb_devices; ++i) {
571  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
572  return 0;
573  }
574 
575  if (ctx->device == LIST_DEVICES)
576  return AVERROR_EXIT;
577 
578  if (!dl_fn->nvenc_device_count) {
579  av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
580  return AVERROR_EXTERNAL;
581  }
582 
583  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
584  return AVERROR(EINVAL);
585  }
586 
587  return 0;
588 }
589 
590 typedef struct GUIDTuple {
591  const GUID guid;
592  int flags;
593 } GUIDTuple;
594 
595 #define PRESET_ALIAS(alias, name, ...) \
596  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
597 
598 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
599 
601 {
602  GUIDTuple presets[] = {
603  PRESET(DEFAULT),
604  PRESET(HP),
605  PRESET(HQ),
606  PRESET(BD),
607  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
608  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
609  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
610  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
611  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
612  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
613  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
614  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
615  };
616 
617  GUIDTuple *t = &presets[ctx->preset];
618 
619  ctx->init_encode_params.presetGUID = t->guid;
620  ctx->flags = t->flags;
621 }
622 
623 #undef PRESET
624 #undef PRESET_ALIAS
625 
626 static av_cold void set_constqp(AVCodecContext *avctx)
627 {
628  NvencContext *ctx = avctx->priv_data;
629  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
630 
631  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
632 
633  if (ctx->init_qp_p >= 0) {
634  rc->constQP.qpInterP = ctx->init_qp_p;
635  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
636  rc->constQP.qpIntra = ctx->init_qp_i;
637  rc->constQP.qpInterB = ctx->init_qp_b;
638  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
639  rc->constQP.qpIntra = av_clip(
640  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
641  rc->constQP.qpInterB = av_clip(
642  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
643  } else {
644  rc->constQP.qpIntra = rc->constQP.qpInterP;
645  rc->constQP.qpInterB = rc->constQP.qpInterP;
646  }
647  } else if (ctx->cqp >= 0) {
648  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
649  if (avctx->b_quant_factor != 0.0)
650  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
651  if (avctx->i_quant_factor != 0.0)
652  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
653  }
654 
655  avctx->qmin = -1;
656  avctx->qmax = -1;
657 }
658 
659 static av_cold void set_vbr(AVCodecContext *avctx)
660 {
661  NvencContext *ctx = avctx->priv_data;
662  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
663  int qp_inter_p;
664 
665  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
666  rc->enableMinQP = 1;
667  rc->enableMaxQP = 1;
668 
669  rc->minQP.qpInterB = avctx->qmin;
670  rc->minQP.qpInterP = avctx->qmin;
671  rc->minQP.qpIntra = avctx->qmin;
672 
673  rc->maxQP.qpInterB = avctx->qmax;
674  rc->maxQP.qpInterP = avctx->qmax;
675  rc->maxQP.qpIntra = avctx->qmax;
676 
677  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
678  } else if (avctx->qmin >= 0) {
679  rc->enableMinQP = 1;
680 
681  rc->minQP.qpInterB = avctx->qmin;
682  rc->minQP.qpInterP = avctx->qmin;
683  rc->minQP.qpIntra = avctx->qmin;
684 
685  qp_inter_p = avctx->qmin;
686  } else {
687  qp_inter_p = 26; // default to 26
688  }
689 
690  rc->enableInitialRCQP = 1;
691 
692  if (ctx->init_qp_p < 0) {
693  rc->initialRCQP.qpInterP = qp_inter_p;
694  } else {
695  rc->initialRCQP.qpInterP = ctx->init_qp_p;
696  }
697 
698  if (ctx->init_qp_i < 0) {
699  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
700  rc->initialRCQP.qpIntra = av_clip(
701  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
702  } else {
703  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
704  }
705  } else {
706  rc->initialRCQP.qpIntra = ctx->init_qp_i;
707  }
708 
709  if (ctx->init_qp_b < 0) {
710  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
711  rc->initialRCQP.qpInterB = av_clip(
712  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
713  } else {
714  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
715  }
716  } else {
717  rc->initialRCQP.qpInterB = ctx->init_qp_b;
718  }
719 }
720 
722 {
723  NvencContext *ctx = avctx->priv_data;
724  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
725 
726  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
727  rc->constQP.qpInterB = 0;
728  rc->constQP.qpInterP = 0;
729  rc->constQP.qpIntra = 0;
730 
731  avctx->qmin = -1;
732  avctx->qmax = -1;
733 }
734 
736 {
737  NvencContext *ctx = avctx->priv_data;
738  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
739 
740  switch (ctx->rc) {
741  case NV_ENC_PARAMS_RC_CONSTQP:
742  set_constqp(avctx);
743  return;
744  case NV_ENC_PARAMS_RC_VBR_MINQP:
745  if (avctx->qmin < 0) {
746  av_log(avctx, AV_LOG_WARNING,
747  "The variable bitrate rate-control requires "
748  "the 'qmin' option set.\n");
749  set_vbr(avctx);
750  return;
751  }
752  /* fall through */
753  case NV_ENC_PARAMS_RC_VBR_HQ:
754  case NV_ENC_PARAMS_RC_VBR:
755  set_vbr(avctx);
756  break;
757  case NV_ENC_PARAMS_RC_CBR:
758  case NV_ENC_PARAMS_RC_CBR_HQ:
759  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
760  break;
761  }
762 
763  rc->rateControlMode = ctx->rc;
764 }
765 
767 {
768  NvencContext *ctx = avctx->priv_data;
769  // default minimum of 4 surfaces
770  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
771  // another multiply by 2 to avoid blocking next PBB group
772  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
773 
774  // lookahead enabled
775  if (ctx->rc_lookahead > 0) {
776  // +1 is to account for lkd_bound calculation later
777  // +4 is to allow sufficient pipelining with lookahead
778  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
779  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
780  {
781  av_log(avctx, AV_LOG_WARNING,
782  "Defined rc_lookahead requires more surfaces, "
783  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
784  }
785  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
786  } else {
787  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
788  {
789  av_log(avctx, AV_LOG_WARNING,
790  "Defined b-frame requires more surfaces, "
791  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
792  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
793  }
794  else if (ctx->nb_surfaces <= 0)
795  ctx->nb_surfaces = nb_surfaces;
796  // otherwise use user specified value
797  }
798 
799  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
800  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
801 
802  return 0;
803 }
804 
806 {
807  NvencContext *ctx = avctx->priv_data;
808 
809  if (avctx->global_quality > 0)
810  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
811 
812  if (ctx->cqp < 0 && avctx->global_quality > 0)
813  ctx->cqp = avctx->global_quality;
814 
815  if (avctx->bit_rate > 0) {
816  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
817  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
818  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
819  }
820 
821  if (avctx->rc_max_rate > 0)
822  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
823 
824  if (ctx->rc < 0) {
825  if (ctx->flags & NVENC_ONE_PASS)
826  ctx->twopass = 0;
827  if (ctx->flags & NVENC_TWO_PASSES)
828  ctx->twopass = 1;
829 
830  if (ctx->twopass < 0)
831  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
832 
833  if (ctx->cbr) {
834  if (ctx->twopass) {
835  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
836  } else {
837  ctx->rc = NV_ENC_PARAMS_RC_CBR;
838  }
839  } else if (ctx->cqp >= 0) {
840  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
841  } else if (ctx->twopass) {
842  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
843  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
844  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
845  }
846  }
847 
848  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
849  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
850  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_quality -> cbr_ld_hq\n");
851  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_size -> cbr_hq\n");
852  av_log(avctx, AV_LOG_WARNING, "\tvbr_2pass -> vbr_hq\n");
853  av_log(avctx, AV_LOG_WARNING, "\tvbr_minqp -> (no replacement)\n");
854 
855  ctx->rc &= ~RC_MODE_DEPRECATED;
856  }
857 
858  if (ctx->flags & NVENC_LOSSLESS) {
859  set_lossless(avctx);
860  } else if (ctx->rc >= 0) {
862  } else {
863  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
864  set_vbr(avctx);
865  }
866 
867  if (avctx->rc_buffer_size > 0) {
868  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
869  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
870  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
871  }
872 
873  if (ctx->aq) {
874  ctx->encode_config.rcParams.enableAQ = 1;
875  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
876  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
877  }
878 
879  if (ctx->temporal_aq) {
880  ctx->encode_config.rcParams.enableTemporalAQ = 1;
881  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
882  }
883 
884  if (ctx->rc_lookahead > 0) {
885  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
886  ctx->encode_config.frameIntervalP - 4;
887 
888  if (lkd_bound < 0) {
889  av_log(avctx, AV_LOG_WARNING,
890  "Lookahead not enabled. Increase buffer delay (-delay).\n");
891  } else {
892  ctx->encode_config.rcParams.enableLookahead = 1;
893  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
894  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
895  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
896  av_log(avctx, AV_LOG_VERBOSE,
897  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
898  ctx->encode_config.rcParams.lookaheadDepth,
899  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
900  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
901  }
902  }
903 
904  if (ctx->strict_gop) {
905  ctx->encode_config.rcParams.strictGOPTarget = 1;
906  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
907  }
908 
909  if (ctx->nonref_p)
910  ctx->encode_config.rcParams.enableNonRefP = 1;
911 
912  if (ctx->zerolatency)
913  ctx->encode_config.rcParams.zeroReorderDelay = 1;
914 
915  if (ctx->quality) {
916  //convert from float to fixed point 8.8
917  int tmp_quality = (int)(ctx->quality * 256.0f);
918  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
919  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
920 
921  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
922 
923  //CQ mode shall discard avg bitrate & honor max bitrate;
924  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
925  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
926  }
927 }
928 
930 {
931  NvencContext *ctx = avctx->priv_data;
932  NV_ENC_CONFIG *cc = &ctx->encode_config;
933  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
934  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
935 
936  vui->colourMatrix = avctx->colorspace;
937  vui->colourPrimaries = avctx->color_primaries;
938  vui->transferCharacteristics = avctx->color_trc;
939  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
940  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
941 
942  vui->colourDescriptionPresentFlag =
943  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
944 
945  vui->videoSignalTypePresentFlag =
946  (vui->colourDescriptionPresentFlag
947  || vui->videoFormat != 5
948  || vui->videoFullRangeFlag != 0);
949 
950  h264->sliceMode = 3;
951  h264->sliceModeData = 1;
952 
953  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
954  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
955  h264->outputAUD = ctx->aud;
956 
957  if (avctx->refs >= 0) {
958  /* 0 means "let the hardware decide" */
959  h264->maxNumRefFrames = avctx->refs;
960  }
961  if (avctx->gop_size >= 0) {
962  h264->idrPeriod = cc->gopLength;
963  }
964 
965  if (IS_CBR(cc->rcParams.rateControlMode)) {
966  h264->outputBufferingPeriodSEI = 1;
967  }
968 
969  h264->outputPictureTimingSEI = 1;
970 
971  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
972  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
973  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
974  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
975  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
976  }
977 
978  if (ctx->flags & NVENC_LOSSLESS) {
979  h264->qpPrimeYZeroTransformBypassFlag = 1;
980  } else {
981  switch(ctx->profile) {
983  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
985  break;
987  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
988  avctx->profile = FF_PROFILE_H264_MAIN;
989  break;
991  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
992  avctx->profile = FF_PROFILE_H264_HIGH;
993  break;
995  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
997  break;
998  }
999  }
1000 
1001  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1002  if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
1003  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1005  }
1006 
1007  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1008 
1009  h264->level = ctx->level;
1010 
1011  if (ctx->coder >= 0)
1012  h264->entropyCodingMode = ctx->coder;
1013 
1014 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1015  h264->useBFramesAsRef = ctx->b_ref_mode;
1016 #endif
1017 
1018  return 0;
1019 }
1020 
1022 {
1023  NvencContext *ctx = avctx->priv_data;
1024  NV_ENC_CONFIG *cc = &ctx->encode_config;
1025  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1026  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1027 
1028  vui->colourMatrix = avctx->colorspace;
1029  vui->colourPrimaries = avctx->color_primaries;
1030  vui->transferCharacteristics = avctx->color_trc;
1031  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1032  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1033 
1034  vui->colourDescriptionPresentFlag =
1035  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1036 
1037  vui->videoSignalTypePresentFlag =
1038  (vui->colourDescriptionPresentFlag
1039  || vui->videoFormat != 5
1040  || vui->videoFullRangeFlag != 0);
1041 
1042  hevc->sliceMode = 3;
1043  hevc->sliceModeData = 1;
1044 
1045  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1046  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1047  hevc->outputAUD = ctx->aud;
1048 
1049  if (avctx->refs >= 0) {
1050  /* 0 means "let the hardware decide" */
1051  hevc->maxNumRefFramesInDPB = avctx->refs;
1052  }
1053  if (avctx->gop_size >= 0) {
1054  hevc->idrPeriod = cc->gopLength;
1055  }
1056 
1057  if (IS_CBR(cc->rcParams.rateControlMode)) {
1058  hevc->outputBufferingPeriodSEI = 1;
1059  }
1060 
1061  hevc->outputPictureTimingSEI = 1;
1062 
1063  switch (ctx->profile) {
1065  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1066  avctx->profile = FF_PROFILE_HEVC_MAIN;
1067  break;
1069  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1071  break;
1073  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1074  avctx->profile = FF_PROFILE_HEVC_REXT;
1075  break;
1076  }
1077 
1078  // force setting profile as main10 if input is 10 bit
1079  if (IS_10BIT(ctx->data_pix_fmt)) {
1080  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1082  }
1083 
1084  // force setting profile as rext if input is yuv444
1085  if (IS_YUV444(ctx->data_pix_fmt)) {
1086  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1087  avctx->profile = FF_PROFILE_HEVC_REXT;
1088  }
1089 
1090  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1091 
1092  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1093 
1094  hevc->level = ctx->level;
1095 
1096  hevc->tier = ctx->tier;
1097 
1098 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1099  hevc->useBFramesAsRef = ctx->b_ref_mode;
1100 #endif
1101 
1102  return 0;
1103 }
1104 
1106 {
1107  switch (avctx->codec->id) {
1108  case AV_CODEC_ID_H264:
1109  return nvenc_setup_h264_config(avctx);
1110  case AV_CODEC_ID_HEVC:
1111  return nvenc_setup_hevc_config(avctx);
1112  /* Earlier switch/case will return if unknown codec is passed. */
1113  }
1114 
1115  return 0;
1116 }
1117 
1118 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1119  int sw, sh;
1120 
1121  sw = avctx->width;
1122  sh = avctx->height;
1123 
1124  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1125  sw *= avctx->sample_aspect_ratio.num;
1126  sh *= avctx->sample_aspect_ratio.den;
1127  }
1128 
1129  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1130 }
1131 
1133 {
1134  NvencContext *ctx = avctx->priv_data;
1135  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1136  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1137 
1138  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1139  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1140  AVCPBProperties *cpb_props;
1141  int res = 0;
1142  int dw, dh;
1143 
1144  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1145  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1146 
1147  ctx->init_encode_params.encodeHeight = avctx->height;
1148  ctx->init_encode_params.encodeWidth = avctx->width;
1149 
1150  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1151 
1153 
1154  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1155  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1156 
1157  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1158  ctx->init_encode_params.encodeGUID,
1159  ctx->init_encode_params.presetGUID,
1160  &preset_config);
1161  if (nv_status != NV_ENC_SUCCESS)
1162  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1163 
1164  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1165 
1166  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1167 
1168  compute_dar(avctx, &dw, &dh);
1169  ctx->init_encode_params.darHeight = dh;
1170  ctx->init_encode_params.darWidth = dw;
1171 
1172  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1173  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1174  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1175  } else {
1176  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1177  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1178  }
1179 
1180  ctx->init_encode_params.enableEncodeAsync = 0;
1181  ctx->init_encode_params.enablePTD = 1;
1182 
1183  if (ctx->weighted_pred == 1)
1184  ctx->init_encode_params.enableWeightedPrediction = 1;
1185 
1186  if (ctx->bluray_compat) {
1187  ctx->aud = 1;
1188  avctx->refs = FFMIN(FFMAX(avctx->refs, 0), 6);
1189  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1190  switch (avctx->codec->id) {
1191  case AV_CODEC_ID_H264:
1192  /* maximum level depends on used resolution */
1193  break;
1194  case AV_CODEC_ID_HEVC:
1195  ctx->level = NV_ENC_LEVEL_HEVC_51;
1196  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1197  break;
1198  }
1199  }
1200 
1201  if (avctx->gop_size > 0) {
1202  if (avctx->max_b_frames >= 0) {
1203  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1204  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1205  }
1206 
1207  ctx->encode_config.gopLength = avctx->gop_size;
1208  } else if (avctx->gop_size == 0) {
1209  ctx->encode_config.frameIntervalP = 0;
1210  ctx->encode_config.gopLength = 1;
1211  }
1212 
1213  ctx->initial_pts[0] = AV_NOPTS_VALUE;
1214  ctx->initial_pts[1] = AV_NOPTS_VALUE;
1215 
1216  nvenc_recalc_surfaces(avctx);
1217 
1218  nvenc_setup_rate_control(avctx);
1219 
1220  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1221  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1222  } else {
1223  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1224  }
1225 
1226  res = nvenc_setup_codec_config(avctx);
1227  if (res)
1228  return res;
1229 
1230  res = nvenc_push_context(avctx);
1231  if (res < 0)
1232  return res;
1233 
1234  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1235 
1236  res = nvenc_pop_context(avctx);
1237  if (res < 0)
1238  return res;
1239 
1240  if (nv_status != NV_ENC_SUCCESS) {
1241  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1242  }
1243 
1244  if (ctx->encode_config.frameIntervalP > 1)
1245  avctx->has_b_frames = 2;
1246 
1247  if (ctx->encode_config.rcParams.averageBitRate > 0)
1248  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1249 
1250  cpb_props = ff_add_cpb_side_data(avctx);
1251  if (!cpb_props)
1252  return AVERROR(ENOMEM);
1253  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1254  cpb_props->avg_bitrate = avctx->bit_rate;
1255  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1256 
1257  return 0;
1258 }
1259 
1260 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1261 {
1262  switch (pix_fmt) {
1263  case AV_PIX_FMT_YUV420P:
1264  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1265  case AV_PIX_FMT_NV12:
1266  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1267  case AV_PIX_FMT_P010:
1268  case AV_PIX_FMT_P016:
1269  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1270  case AV_PIX_FMT_YUV444P:
1271  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1272  case AV_PIX_FMT_YUV444P16:
1273  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1274  case AV_PIX_FMT_0RGB32:
1275  return NV_ENC_BUFFER_FORMAT_ARGB;
1276  case AV_PIX_FMT_0BGR32:
1277  return NV_ENC_BUFFER_FORMAT_ABGR;
1278  default:
1279  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1280  }
1281 }
1282 
1283 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1284 {
1285  NvencContext *ctx = avctx->priv_data;
1286  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1287  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1288  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1289 
1290  NVENCSTATUS nv_status;
1291  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1292  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1293 
1294  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1295  ctx->surfaces[idx].in_ref = av_frame_alloc();
1296  if (!ctx->surfaces[idx].in_ref)
1297  return AVERROR(ENOMEM);
1298  } else {
1299  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1300 
1301  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1302  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1303  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1304  av_get_pix_fmt_name(ctx->data_pix_fmt));
1305  return AVERROR(EINVAL);
1306  }
1307 
1308  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1309  allocSurf.width = avctx->width;
1310  allocSurf.height = avctx->height;
1311  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1312 
1313  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1314  if (nv_status != NV_ENC_SUCCESS) {
1315  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1316  }
1317 
1318  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1319  ctx->surfaces[idx].width = allocSurf.width;
1320  ctx->surfaces[idx].height = allocSurf.height;
1321  }
1322 
1323  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1324  if (nv_status != NV_ENC_SUCCESS) {
1325  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1326  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1327  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1328  av_frame_free(&ctx->surfaces[idx].in_ref);
1329  return err;
1330  }
1331 
1332  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1333  ctx->surfaces[idx].size = allocOut.size;
1334 
1335  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1336 
1337  return 0;
1338 }
1339 
1341 {
1342  NvencContext *ctx = avctx->priv_data;
1343  int i, res = 0, res2;
1344 
1345  ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1346  if (!ctx->surfaces)
1347  return AVERROR(ENOMEM);
1348 
1349  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1350  if (!ctx->timestamp_list)
1351  return AVERROR(ENOMEM);
1352 
1353  ctx->unused_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1354  if (!ctx->unused_surface_queue)
1355  return AVERROR(ENOMEM);
1356 
1357  ctx->output_surface_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1358  if (!ctx->output_surface_queue)
1359  return AVERROR(ENOMEM);
1360  ctx->output_surface_ready_queue = av_fifo_alloc(ctx->nb_surfaces * sizeof(NvencSurface*));
1361  if (!ctx->output_surface_ready_queue)
1362  return AVERROR(ENOMEM);
1363 
1364  res = nvenc_push_context(avctx);
1365  if (res < 0)
1366  return res;
1367 
1368  for (i = 0; i < ctx->nb_surfaces; i++) {
1369  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1370  goto fail;
1371  }
1372 
1373 fail:
1374  res2 = nvenc_pop_context(avctx);
1375  if (res2 < 0)
1376  return res2;
1377 
1378  return res;
1379 }
1380 
1382 {
1383  NvencContext *ctx = avctx->priv_data;
1384  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1385  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1386 
1387  NVENCSTATUS nv_status;
1388  uint32_t outSize = 0;
1389  char tmpHeader[256];
1390  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1391  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1392 
1393  payload.spsppsBuffer = tmpHeader;
1394  payload.inBufferSize = sizeof(tmpHeader);
1395  payload.outSPSPPSPayloadSize = &outSize;
1396 
1397  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1398  if (nv_status != NV_ENC_SUCCESS) {
1399  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1400  }
1401 
1402  avctx->extradata_size = outSize;
1404 
1405  if (!avctx->extradata) {
1406  return AVERROR(ENOMEM);
1407  }
1408 
1409  memcpy(avctx->extradata, tmpHeader, outSize);
1410 
1411  return 0;
1412 }
1413 
1415 {
1416  NvencContext *ctx = avctx->priv_data;
1417  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1418  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1419  int i, res;
1420 
1421  /* the encoder has to be flushed before it can be closed */
1422  if (ctx->nvencoder) {
1423  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1424  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1425 
1426  res = nvenc_push_context(avctx);
1427  if (res < 0)
1428  return res;
1429 
1430  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1431  }
1432 
1433  av_fifo_freep(&ctx->timestamp_list);
1434  av_fifo_freep(&ctx->output_surface_ready_queue);
1435  av_fifo_freep(&ctx->output_surface_queue);
1436  av_fifo_freep(&ctx->unused_surface_queue);
1437 
1438  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1439  for (i = 0; i < ctx->nb_registered_frames; i++) {
1440  if (ctx->registered_frames[i].mapped)
1441  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1442  if (ctx->registered_frames[i].regptr)
1443  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1444  }
1445  ctx->nb_registered_frames = 0;
1446  }
1447 
1448  if (ctx->surfaces) {
1449  for (i = 0; i < ctx->nb_surfaces; ++i) {
1450  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1451  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1452  av_frame_free(&ctx->surfaces[i].in_ref);
1453  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1454  }
1455  }
1456  av_freep(&ctx->surfaces);
1457  ctx->nb_surfaces = 0;
1458 
1459  if (ctx->nvencoder) {
1460  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1461 
1462  res = nvenc_pop_context(avctx);
1463  if (res < 0)
1464  return res;
1465  }
1466  ctx->nvencoder = NULL;
1467 
1468  if (ctx->cu_context_internal)
1469  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1470  ctx->cu_context = ctx->cu_context_internal = NULL;
1471 
1472 #if CONFIG_D3D11VA
1473  if (ctx->d3d11_device) {
1474  ID3D11Device_Release(ctx->d3d11_device);
1475  ctx->d3d11_device = NULL;
1476  }
1477 #endif
1478 
1479  nvenc_free_functions(&dl_fn->nvenc_dl);
1480  cuda_free_functions(&dl_fn->cuda_dl);
1481 
1482  dl_fn->nvenc_device_count = 0;
1483 
1484  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1485 
1486  return 0;
1487 }
1488 
1490 {
1491  NvencContext *ctx = avctx->priv_data;
1492  int ret;
1493 
1494  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1495  AVHWFramesContext *frames_ctx;
1496  if (!avctx->hw_frames_ctx) {
1497  av_log(avctx, AV_LOG_ERROR,
1498  "hw_frames_ctx must be set when using GPU frames as input\n");
1499  return AVERROR(EINVAL);
1500  }
1501  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1502  if (frames_ctx->format != avctx->pix_fmt) {
1503  av_log(avctx, AV_LOG_ERROR,
1504  "hw_frames_ctx must match the GPU frame type\n");
1505  return AVERROR(EINVAL);
1506  }
1507  ctx->data_pix_fmt = frames_ctx->sw_format;
1508  } else {
1509  ctx->data_pix_fmt = avctx->pix_fmt;
1510  }
1511 
1512  if ((ret = nvenc_load_libraries(avctx)) < 0)
1513  return ret;
1514 
1515  if ((ret = nvenc_setup_device(avctx)) < 0)
1516  return ret;
1517 
1518  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1519  return ret;
1520 
1521  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1522  return ret;
1523 
1524  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1525  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1526  return ret;
1527  }
1528 
1529  return 0;
1530 }
1531 
1533 {
1534  NvencSurface *tmp_surf;
1535 
1536  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1537  // queue empty
1538  return NULL;
1539 
1540  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1541  return tmp_surf;
1542 }
1543 
1544 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1545  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1546 {
1547  int dst_linesize[4] = {
1548  lock_buffer_params->pitch,
1549  lock_buffer_params->pitch,
1550  lock_buffer_params->pitch,
1551  lock_buffer_params->pitch
1552  };
1553  uint8_t *dst_data[4];
1554  int ret;
1555 
1556  if (frame->format == AV_PIX_FMT_YUV420P)
1557  dst_linesize[1] = dst_linesize[2] >>= 1;
1558 
1559  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1560  lock_buffer_params->bufferDataPtr, dst_linesize);
1561  if (ret < 0)
1562  return ret;
1563 
1564  if (frame->format == AV_PIX_FMT_YUV420P)
1565  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1566 
1567  av_image_copy(dst_data, dst_linesize,
1568  (const uint8_t**)frame->data, frame->linesize, frame->format,
1569  avctx->width, avctx->height);
1570 
1571  return 0;
1572 }
1573 
1575 {
1576  NvencContext *ctx = avctx->priv_data;
1577  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1578  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1579  NVENCSTATUS nv_status;
1580 
1581  int i, first_round;
1582 
1583  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
1584  for (first_round = 1; first_round >= 0; first_round--) {
1585  for (i = 0; i < ctx->nb_registered_frames; i++) {
1586  if (!ctx->registered_frames[i].mapped) {
1587  if (ctx->registered_frames[i].regptr) {
1588  if (first_round)
1589  continue;
1590  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1591  if (nv_status != NV_ENC_SUCCESS)
1592  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1593  ctx->registered_frames[i].ptr = NULL;
1594  ctx->registered_frames[i].regptr = NULL;
1595  }
1596  return i;
1597  }
1598  }
1599  }
1600  } else {
1601  return ctx->nb_registered_frames++;
1602  }
1603 
1604  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1605  return AVERROR(ENOMEM);
1606 }
1607 
1609 {
1610  NvencContext *ctx = avctx->priv_data;
1611  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1612  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1613 
1614  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1615  NV_ENC_REGISTER_RESOURCE reg;
1616  int i, idx, ret;
1617 
1618  for (i = 0; i < ctx->nb_registered_frames; i++) {
1619  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1620  return i;
1621  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1622  return i;
1623  }
1624 
1625  idx = nvenc_find_free_reg_resource(avctx);
1626  if (idx < 0)
1627  return idx;
1628 
1629  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1630  reg.width = frames_ctx->width;
1631  reg.height = frames_ctx->height;
1632  reg.pitch = frame->linesize[0];
1633  reg.resourceToRegister = frame->data[0];
1634 
1635  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1636  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1637  }
1638  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1639  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1640  reg.subResourceIndex = (intptr_t)frame->data[1];
1641  }
1642 
1643  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1644  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1645  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1646  av_get_pix_fmt_name(frames_ctx->sw_format));
1647  return AVERROR(EINVAL);
1648  }
1649 
1650  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1651  if (ret != NV_ENC_SUCCESS) {
1652  nvenc_print_error(avctx, ret, "Error registering an input resource");
1653  return AVERROR_UNKNOWN;
1654  }
1655 
1656  ctx->registered_frames[idx].ptr = frame->data[0];
1657  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1658  ctx->registered_frames[idx].regptr = reg.registeredResource;
1659  return idx;
1660 }
1661 
1663  NvencSurface *nvenc_frame)
1664 {
1665  NvencContext *ctx = avctx->priv_data;
1666  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1667  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1668 
1669  int res;
1670  NVENCSTATUS nv_status;
1671 
1672  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1673  int reg_idx = nvenc_register_frame(avctx, frame);
1674  if (reg_idx < 0) {
1675  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1676  return reg_idx;
1677  }
1678 
1679  res = av_frame_ref(nvenc_frame->in_ref, frame);
1680  if (res < 0)
1681  return res;
1682 
1683  if (!ctx->registered_frames[reg_idx].mapped) {
1684  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1685  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1686  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1687  if (nv_status != NV_ENC_SUCCESS) {
1688  av_frame_unref(nvenc_frame->in_ref);
1689  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1690  }
1691  }
1692 
1693  ctx->registered_frames[reg_idx].mapped += 1;
1694 
1695  nvenc_frame->reg_idx = reg_idx;
1696  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1697  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1698  nvenc_frame->pitch = frame->linesize[0];
1699 
1700  return 0;
1701  } else {
1702  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1703 
1704  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1705  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1706 
1707  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1708  if (nv_status != NV_ENC_SUCCESS) {
1709  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1710  }
1711 
1712  nvenc_frame->pitch = lockBufferParams.pitch;
1713  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1714 
1715  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1716  if (nv_status != NV_ENC_SUCCESS) {
1717  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1718  }
1719 
1720  return res;
1721  }
1722 }
1723 
1725  NV_ENC_PIC_PARAMS *params,
1726  NV_ENC_SEI_PAYLOAD *sei_data)
1727 {
1728  NvencContext *ctx = avctx->priv_data;
1729 
1730  switch (avctx->codec->id) {
1731  case AV_CODEC_ID_H264:
1732  params->codecPicParams.h264PicParams.sliceMode =
1733  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1734  params->codecPicParams.h264PicParams.sliceModeData =
1735  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1736  if (sei_data) {
1737  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1738  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = 1;
1739  }
1740 
1741  break;
1742  case AV_CODEC_ID_HEVC:
1743  params->codecPicParams.hevcPicParams.sliceMode =
1744  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1745  params->codecPicParams.hevcPicParams.sliceModeData =
1746  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1747  if (sei_data) {
1748  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1749  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = 1;
1750  }
1751 
1752  break;
1753  }
1754 }
1755 
1756 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1757 {
1758  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
1759 }
1760 
1761 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1762 {
1763  int64_t timestamp = AV_NOPTS_VALUE;
1764  if (av_fifo_size(queue) > 0)
1765  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
1766 
1767  return timestamp;
1768 }
1769 
1771  NV_ENC_LOCK_BITSTREAM *params,
1772  AVPacket *pkt)
1773 {
1774  NvencContext *ctx = avctx->priv_data;
1775 
1776  pkt->pts = params->outputTimeStamp;
1777 
1778  /* generate the first dts by linearly extrapolating the
1779  * first two pts values to the past */
1780  if (avctx->max_b_frames > 0 && !ctx->first_packet_output &&
1781  ctx->initial_pts[1] != AV_NOPTS_VALUE) {
1782  int64_t ts0 = ctx->initial_pts[0], ts1 = ctx->initial_pts[1];
1783  int64_t delta;
1784 
1785  if ((ts0 < 0 && ts1 > INT64_MAX + ts0) ||
1786  (ts0 > 0 && ts1 < INT64_MIN + ts0))
1787  return AVERROR(ERANGE);
1788  delta = ts1 - ts0;
1789 
1790  if ((delta < 0 && ts0 > INT64_MAX + delta) ||
1791  (delta > 0 && ts0 < INT64_MIN + delta))
1792  return AVERROR(ERANGE);
1793  pkt->dts = ts0 - delta;
1794 
1795  ctx->first_packet_output = 1;
1796  } else {
1797  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
1798  }
1799 
1800  pkt->dts -= avctx->max_b_frames;
1801 
1802  return 0;
1803 }
1804 
1806 {
1807  NvencContext *ctx = avctx->priv_data;
1808  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1809  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1810 
1811  uint32_t slice_mode_data;
1812  uint32_t *slice_offsets = NULL;
1813  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1814  NVENCSTATUS nv_status;
1815  int res = 0;
1816 
1817  enum AVPictureType pict_type;
1818 
1819  switch (avctx->codec->id) {
1820  case AV_CODEC_ID_H264:
1821  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1822  break;
1823  case AV_CODEC_ID_H265:
1824  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1825  break;
1826  default:
1827  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1828  res = AVERROR(EINVAL);
1829  goto error;
1830  }
1831  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1832 
1833  if (!slice_offsets) {
1834  res = AVERROR(ENOMEM);
1835  goto error;
1836  }
1837 
1838  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1839 
1840  lock_params.doNotWait = 0;
1841  lock_params.outputBitstream = tmpoutsurf->output_surface;
1842  lock_params.sliceOffsets = slice_offsets;
1843 
1844  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1845  if (nv_status != NV_ENC_SUCCESS) {
1846  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1847  goto error;
1848  }
1849 
1850  res = pkt->data ?
1851  ff_alloc_packet2(avctx, pkt, lock_params.bitstreamSizeInBytes, lock_params.bitstreamSizeInBytes) :
1852  av_new_packet(pkt, lock_params.bitstreamSizeInBytes);
1853 
1854  if (res < 0) {
1855  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1856  goto error;
1857  }
1858 
1859  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1860 
1861  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1862  if (nv_status != NV_ENC_SUCCESS) {
1863  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1864  goto error;
1865  }
1866 
1867 
1868  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1869  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
1870  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
1871  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
1872  if (nv_status != NV_ENC_SUCCESS) {
1873  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
1874  goto error;
1875  }
1876  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
1877  res = AVERROR_BUG;
1878  goto error;
1879  }
1880 
1881  av_frame_unref(tmpoutsurf->in_ref);
1882 
1883  tmpoutsurf->input_surface = NULL;
1884  }
1885 
1886  switch (lock_params.pictureType) {
1887  case NV_ENC_PIC_TYPE_IDR:
1889  case NV_ENC_PIC_TYPE_I:
1890  pict_type = AV_PICTURE_TYPE_I;
1891  break;
1892  case NV_ENC_PIC_TYPE_P:
1893  pict_type = AV_PICTURE_TYPE_P;
1894  break;
1895  case NV_ENC_PIC_TYPE_B:
1896  pict_type = AV_PICTURE_TYPE_B;
1897  break;
1898  case NV_ENC_PIC_TYPE_BI:
1899  pict_type = AV_PICTURE_TYPE_BI;
1900  break;
1901  default:
1902  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
1903  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
1904  res = AVERROR_EXTERNAL;
1905  goto error;
1906  }
1907 
1908 #if FF_API_CODED_FRAME
1910  avctx->coded_frame->pict_type = pict_type;
1912 #endif
1913 
1915  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
1916 
1917  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
1918  if (res < 0)
1919  goto error2;
1920 
1921  av_free(slice_offsets);
1922 
1923  return 0;
1924 
1925 error:
1926  timestamp_queue_dequeue(ctx->timestamp_list);
1927 
1928 error2:
1929  av_free(slice_offsets);
1930 
1931  return res;
1932 }
1933 
1934 static int output_ready(AVCodecContext *avctx, int flush)
1935 {
1936  NvencContext *ctx = avctx->priv_data;
1937  int nb_ready, nb_pending;
1938 
1939  /* when B-frames are enabled, we wait for two initial timestamps to
1940  * calculate the first dts */
1941  if (!flush && avctx->max_b_frames > 0 &&
1942  (ctx->initial_pts[0] == AV_NOPTS_VALUE || ctx->initial_pts[1] == AV_NOPTS_VALUE))
1943  return 0;
1944 
1945  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
1946  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
1947  if (flush)
1948  return nb_ready > 0;
1949  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
1950 }
1951 
1952 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
1953 {
1954  NvencContext *ctx = avctx->priv_data;
1955  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
1956  NVENCSTATUS ret;
1957 
1958  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
1959  int needs_reconfig = 0;
1960  int needs_encode_config = 0;
1961  int reconfig_bitrate = 0, reconfig_dar = 0;
1962  int dw, dh;
1963 
1964  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
1965  params.reInitEncodeParams = ctx->init_encode_params;
1966 
1967  compute_dar(avctx, &dw, &dh);
1968  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
1969  av_log(avctx, AV_LOG_VERBOSE,
1970  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
1971  ctx->init_encode_params.darWidth,
1972  ctx->init_encode_params.darHeight, dw, dh);
1973 
1974  params.reInitEncodeParams.darHeight = dh;
1975  params.reInitEncodeParams.darWidth = dw;
1976 
1977  needs_reconfig = 1;
1978  reconfig_dar = 1;
1979  }
1980 
1981  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
1982  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
1983  av_log(avctx, AV_LOG_VERBOSE,
1984  "avg bitrate change: %d -> %d\n",
1985  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
1986  (uint32_t)avctx->bit_rate);
1987 
1988  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
1989  reconfig_bitrate = 1;
1990  }
1991 
1992  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
1993  av_log(avctx, AV_LOG_VERBOSE,
1994  "max bitrate change: %d -> %d\n",
1995  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
1996  (uint32_t)avctx->rc_max_rate);
1997 
1998  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
1999  reconfig_bitrate = 1;
2000  }
2001 
2002  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2003  av_log(avctx, AV_LOG_VERBOSE,
2004  "vbv buffer size change: %d -> %d\n",
2005  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2006  avctx->rc_buffer_size);
2007 
2008  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2009  reconfig_bitrate = 1;
2010  }
2011 
2012  if (reconfig_bitrate) {
2013  params.resetEncoder = 1;
2014  params.forceIDR = 1;
2015 
2016  needs_encode_config = 1;
2017  needs_reconfig = 1;
2018  }
2019  }
2020 
2021  if (!needs_encode_config)
2022  params.reInitEncodeParams.encodeConfig = NULL;
2023 
2024  if (needs_reconfig) {
2025  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2026  if (ret != NV_ENC_SUCCESS) {
2027  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2028  } else {
2029  if (reconfig_dar) {
2030  ctx->init_encode_params.darHeight = dh;
2031  ctx->init_encode_params.darWidth = dw;
2032  }
2033 
2034  if (reconfig_bitrate) {
2035  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2036  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2037  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2038  }
2039 
2040  }
2041  }
2042 }
2043 
2045 {
2046  NVENCSTATUS nv_status;
2047  NvencSurface *tmp_out_surf, *in_surf;
2048  int res, res2;
2049  NV_ENC_SEI_PAYLOAD *sei_data = NULL;
2050  size_t sei_size;
2051 
2052  NvencContext *ctx = avctx->priv_data;
2053  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2054  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2055 
2056  NV_ENC_PIC_PARAMS pic_params = { 0 };
2057  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2058 
2059  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2060  return AVERROR(EINVAL);
2061 
2062  if (ctx->encoder_flushing) {
2063  if (avctx->internal->draining)
2064  return AVERROR_EOF;
2065 
2066  ctx->encoder_flushing = 0;
2067  ctx->first_packet_output = 0;
2068  ctx->initial_pts[0] = AV_NOPTS_VALUE;
2069  ctx->initial_pts[1] = AV_NOPTS_VALUE;
2070  av_fifo_reset(ctx->timestamp_list);
2071  }
2072 
2073  if (frame) {
2074  in_surf = get_free_frame(ctx);
2075  if (!in_surf)
2076  return AVERROR(EAGAIN);
2077 
2078  res = nvenc_push_context(avctx);
2079  if (res < 0)
2080  return res;
2081 
2082  reconfig_encoder(avctx, frame);
2083 
2084  res = nvenc_upload_frame(avctx, frame, in_surf);
2085 
2086  res2 = nvenc_pop_context(avctx);
2087  if (res2 < 0)
2088  return res2;
2089 
2090  if (res)
2091  return res;
2092 
2093  pic_params.inputBuffer = in_surf->input_surface;
2094  pic_params.bufferFmt = in_surf->format;
2095  pic_params.inputWidth = in_surf->width;
2096  pic_params.inputHeight = in_surf->height;
2097  pic_params.inputPitch = in_surf->pitch;
2098  pic_params.outputBitstream = in_surf->output_surface;
2099 
2100  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2101  if (frame->top_field_first)
2102  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2103  else
2104  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2105  } else {
2106  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2107  }
2108 
2109  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2110  pic_params.encodePicFlags =
2111  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2112  } else {
2113  pic_params.encodePicFlags = 0;
2114  }
2115 
2116  pic_params.inputTimeStamp = frame->pts;
2117 
2119  if (ff_alloc_a53_sei(frame, sizeof(NV_ENC_SEI_PAYLOAD), (void**)&sei_data, &sei_size) < 0) {
2120  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2121  }
2122 
2123  if (sei_data) {
2124  sei_data->payloadSize = (uint32_t)sei_size;
2125  sei_data->payloadType = 4;
2126  sei_data->payload = (uint8_t*)(sei_data + 1);
2127  }
2128  }
2129 
2130  nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data);
2131  } else {
2132  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2133  ctx->encoder_flushing = 1;
2134  }
2135 
2136  res = nvenc_push_context(avctx);
2137  if (res < 0)
2138  return res;
2139 
2140  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2141  av_free(sei_data);
2142 
2143  res = nvenc_pop_context(avctx);
2144  if (res < 0)
2145  return res;
2146 
2147  if (nv_status != NV_ENC_SUCCESS &&
2148  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2149  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2150 
2151  if (frame) {
2152  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2153  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
2154 
2155  if (ctx->initial_pts[0] == AV_NOPTS_VALUE)
2156  ctx->initial_pts[0] = frame->pts;
2157  else if (ctx->initial_pts[1] == AV_NOPTS_VALUE)
2158  ctx->initial_pts[1] = frame->pts;
2159  }
2160 
2161  /* all the pending buffers are now ready for output */
2162  if (nv_status == NV_ENC_SUCCESS) {
2163  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2164  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2165  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2166  }
2167  }
2168 
2169  return 0;
2170 }
2171 
2173 {
2174  NvencSurface *tmp_out_surf;
2175  int res, res2;
2176 
2177  NvencContext *ctx = avctx->priv_data;
2178 
2179  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2180  return AVERROR(EINVAL);
2181 
2182  if (output_ready(avctx, ctx->encoder_flushing)) {
2183  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2184 
2185  res = nvenc_push_context(avctx);
2186  if (res < 0)
2187  return res;
2188 
2189  res = process_output_surface(avctx, pkt, tmp_out_surf);
2190 
2191  res2 = nvenc_pop_context(avctx);
2192  if (res2 < 0)
2193  return res2;
2194 
2195  if (res)
2196  return res;
2197 
2198  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2199  } else if (ctx->encoder_flushing) {
2200  return AVERROR_EOF;
2201  } else {
2202  return AVERROR(EAGAIN);
2203  }
2204 
2205  return 0;
2206 }
2207 
2209  const AVFrame *frame, int *got_packet)
2210 {
2211  NvencContext *ctx = avctx->priv_data;
2212  int res;
2213 
2214  if (!ctx->encoder_flushing) {
2215  res = ff_nvenc_send_frame(avctx, frame);
2216  if (res < 0)
2217  return res;
2218  }
2219 
2220  res = ff_nvenc_receive_packet(avctx, pkt);
2221  if (res == AVERROR(EAGAIN) || res == AVERROR_EOF) {
2222  *got_packet = 0;
2223  } else if (res < 0) {
2224  return res;
2225  } else {
2226  *got_packet = 1;
2227  }
2228 
2229  return 0;
2230 }
nvenc_errors
static const struct @120 nvenc_errors[]
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:91
FF_PROFILE_HEVC_REXT
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:2989
FF_ENABLE_DEPRECATION_WARNINGS
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:85
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:182
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:595
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:235
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:591
level
uint8_t level
Definition: svq3.c:207
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:2193
av_fifo_generic_write
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:122
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:105
FFSWAP
#define FFSWAP(type, a, b)
Definition: common.h:99
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:734
GUIDTuple
Definition: nvenc.c:590
GUIDTuple::flags
int flags
Definition: nvenc.c:592
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:55
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:720
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:89
FF_PROFILE_H264_BASELINE
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:2937
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
AV_CODEC_ID_H265
#define AV_CODEC_ID_H265
Definition: avcodec.h:393
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:205
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:208
AVPictureType
AVPictureType
Definition: avutil.h:272
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:1934
NvencContext
Definition: nvenc.h:120
count
void INT64 INT64 count
Definition: avisynth_c.h:767
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:60
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:202
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:295
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:2186
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:1770
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
the normal 2^n-1 "JPEG" YUV ranges
Definition: pixfmt.h:522
internal.h
name
const char * name
Definition: avisynth_c.h:867
AVPacket::data
uint8_t * data
Definition: avcodec.h:1477
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:1847
FF_PROFILE_H264_HIGH_444_PREDICTIVE
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:2949
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1952
av_mallocz_array
void * av_mallocz_array(size_t nmemb, size_t size)
Definition: mem.c:191
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:192
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:42
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:626
NvencSurface
Definition: nvenc.h:57
BD
#define BD
av_fifo_generic_read
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:213
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:71
ff_add_cpb_side_data
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:2013
AVHWFramesContext::width
int width
The allocated dimensions of the frames in this pool.
Definition: hwcontext.h:228
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:2414
nverr
NVENCSTATUS nverr
Definition: nvenc.c:66
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:721
PRESET
#define PRESET(name,...)
Definition: nvenc.c:598
av_fifo_reset
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied.
Definition: fifo.c:71
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: avcodec.h:1509
PRESET_LOSSLESS_DEFAULT
@ PRESET_LOSSLESS_DEFAULT
Definition: nvenc.h:91
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:904
nvenc.h
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVFifoBuffer
Definition: fifo.h:31
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1118
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:3105
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1662
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:77
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:1870
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:659
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:98
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:1574
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:290
fail
#define fail()
Definition: checkasm.h:120
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:67
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:2153
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:600
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:1645
FF_PROFILE_H264_HIGH
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:2941
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1544
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:51
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:111
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:123
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:896
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:307
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:60
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:98
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:189
avassert.h
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:2179
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:176
av_cold
#define av_cold
Definition: attributes.h:84
FF_PROFILE_HEVC_MAIN
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:2986
AVHWFramesContext::height
int height
Definition: hwcontext.h:228
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:1667
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:1855
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1489
width
#define width
av_new_packet
int av_new_packet(AVPacket *pkt, int size)
Allocate the payload of a packet and initialize its fields with default values.
Definition: avpacket.c:86
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1631
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:400
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1473
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:365
AVCodecContext::ticks_per_frame
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:1697
NvencDynLoadFunctions
Definition: nvenc.h:71
ctx
AVFormatContext * ctx
Definition: movenc.c:48
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demuxing_decoding.c:40
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: utils.c:2212
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1381
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:1756
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:2443
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:116
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:74
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: avcodec.h:1128
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: avcodec.h:245
NvencSurface::pitch
int pitch
Definition: nvenc.h:64
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:59
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data)
Definition: nvenc.c:1724
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:2428
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:37
AVCPBProperties::avg_bitrate
int avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: avcodec.h:1152
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:58
nvenc_setup_rate_control
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:805
flush
static void flush(AVCodecContext *avctx)
Definition: aacdec_template.c:500
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:221
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:61
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:2200
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:99
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:1600
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:1615
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1414
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:274
FF_PROFILE_HEVC_MAIN_10
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:2987
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:73
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:929
error
static void error(const char *err)
Definition: target_dec_fuzzer.c:61
for
for(j=16;j >0;--j)
Definition: h264pred_template.c:469
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:1688
desc
const char * desc
Definition: nvenc.c:68
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:216
AVFrame::pict_type
enum AVPictureType pict_type
Picture type of the frame.
Definition: frame.h:378
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1760
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:443
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:254
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:39
FFMAX
#define FFMAX(a, b)
Definition: common.h:94
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1283
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:411
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1608
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:111
val
const char const char void * val
Definition: avisynth_c.h:863
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2172
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: avcodec.h:1476
height
#define height
FFMIN
#define FFMIN(a, b)
Definition: common.h:96
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:735
AVCPBProperties::max_bitrate
int max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: avcodec.h:1134
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:57
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: avcodec.h:1483
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:313
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1532
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:187
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:1834
AVCodec::id
enum AVCodecID id
Definition: avcodec.h:3495
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:228
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:259
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: avcodec.h:1470
AVCodecContext::extradata
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:1666
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:1805
ff_nvenc_encode_frame
int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *frame, int *got_packet)
Definition: nvenc.c:2208
nvenc_print_error
static int nvenc_print_error(void *log_ctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:113
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:109
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:110
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:161
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:766
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
delta
float delta
Definition: vorbis_enc_data.h:457
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: avcodec.h:392
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:668
uint8_t
uint8_t
Definition: audio_convert.c:194
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:553
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:236
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:3314
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:104
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:62
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:38
AVCodecContext::height
int height
Definition: avcodec.h:1738
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:1775
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:35
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1260
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:437
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:3262
NvencSurface::width
int width
Definition: nvenc.h:62
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:123
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:170
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:78
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1132
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:264
averr
int averr
Definition: nvenc.c:67
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:364
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:148
cuda_check.h
AVCPBProperties::buffer_size
int buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: avcodec.h:1161
params
const char const char * params
Definition: avisynth_c.h:867
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: avcodec.h:790
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen_template.c:38
AVCodecContext::coded_frame
attribute_deprecated AVFrame * coded_frame
the picture in the bitstream
Definition: avcodec.h:2815
AVCodecContext
main external API structure.
Definition: avcodec.h:1565
av_image_copy
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:387
pkt
static AVPacket pkt
Definition: demuxing_decoding.c:54
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:276
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:112
NvencSurface::height
int height
Definition: nvenc.h:63
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:2407
AVRational::den
int den
Denominator.
Definition: rational.h:60
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:1761
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:65
config.h
dummy
int dummy
Definition: motion.c:64
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:2898
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1340
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:1877
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:66
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1574
FF_PROFILE_H264_MAIN
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:2939
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:97
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:436
AVCodecInternal::draining
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:195
FF_DISABLE_DEPRECATION_WARNINGS
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:84
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:76
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:96
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:275
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:1825
av_fifo_size
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:77
av_fifo_freep
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:63
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
DEFAULT
#define DEFAULT
Definition: avdct.c:28
AVPacket
This structure stores compressed data.
Definition: avcodec.h:1454
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:1592
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:280
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:485
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:1738
av_fifo_alloc
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:43
imgutils.h
flags
#define flags(name, subs,...)
Definition: cbs_av1.c:565
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:50
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:28
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:56
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1105
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:103
ff_alloc_packet2
int ff_alloc_packet2(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int64_t min_size)
Check AVPacket size and/or allocate data.
Definition: encode.c:32
int
int
Definition: ffmpeg_filter.c:191
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:117
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:1944
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1021
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:40
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2438
ff_nvenc_send_frame
int ff_nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2044