22 #include <va/va_enc_hevc.h>
100 char *
data,
size_t *data_len,
114 "%zu < %zu.\n", *data_len,
136 "type = %d.\n",
header->nal_unit_type);
144 char *
data,
size_t *data_len)
178 char *
data,
size_t *data_len)
204 char *
data,
size_t *data_len)
249 *
type = VAEncPackedHeaderRawData;
269 VAEncSequenceParameterBufferHEVC *vseq =
ctx->codec_sequence_params;
270 VAEncPictureParameterBufferHEVC *vpic =
ctx->codec_picture_params;
275 memset(
vps, 0,
sizeof(*
vps));
276 memset(
sps, 0,
sizeof(*
sps));
277 memset(
pps, 0,
sizeof(*
pps));
282 if (
desc->nb_components == 1) {
285 if (
desc->log2_chroma_w == 1 &&
desc->log2_chroma_h == 1) {
287 }
else if (
desc->log2_chroma_w == 1 &&
desc->log2_chroma_h == 0) {
289 }
else if (
desc->log2_chroma_w == 0 &&
desc->log2_chroma_h == 0) {
293 "%s is not supported.\n",
desc->name);
305 .nuh_temporal_id_plus1 = 1,
308 vps->vps_video_parameter_set_id = 0;
310 vps->vps_base_layer_internal_flag = 1;
311 vps->vps_base_layer_available_flag = 1;
312 vps->vps_max_layers_minus1 = 0;
313 vps->vps_max_sub_layers_minus1 = 0;
314 vps->vps_temporal_id_nesting_flag = 1;
354 ctx->surface_width,
ctx->surface_height,
355 ctx->nb_slices,
ctx->tile_rows,
ctx->tile_cols,
356 (
ctx->b_per_p > 0) + 1);
362 "any normal level; using level 8.5.\n");
369 vps->vps_sub_layer_ordering_info_present_flag = 0;
370 vps->vps_max_dec_pic_buffering_minus1[0] =
ctx->max_b_depth + 1;
371 vps->vps_max_num_reorder_pics[0] =
ctx->max_b_depth;
372 vps->vps_max_latency_increase_plus1[0] = 0;
374 vps->vps_max_layer_id = 0;
375 vps->vps_num_layer_sets_minus1 = 0;
376 vps->layer_id_included_flag[0][0] = 1;
378 vps->vps_timing_info_present_flag = 1;
382 vps->vps_poc_proportional_to_timing_flag = 1;
383 vps->vps_num_ticks_poc_diff_one_minus1 = 0;
387 vps->vps_poc_proportional_to_timing_flag = 0;
389 vps->vps_num_hrd_parameters = 0;
397 .nuh_temporal_id_plus1 = 1,
400 sps->sps_video_parameter_set_id =
vps->vps_video_parameter_set_id;
402 sps->sps_max_sub_layers_minus1 =
vps->vps_max_sub_layers_minus1;
403 sps->sps_temporal_id_nesting_flag =
vps->vps_temporal_id_nesting_flag;
405 sps->profile_tier_level =
vps->profile_tier_level;
407 sps->sps_seq_parameter_set_id = 0;
409 sps->chroma_format_idc = chroma_format;
410 sps->separate_colour_plane_flag = 0;
412 sps->pic_width_in_luma_samples =
ctx->surface_width;
413 sps->pic_height_in_luma_samples =
ctx->surface_height;
415 if (avctx->
width !=
ctx->surface_width ||
417 sps->conformance_window_flag = 1;
418 sps->conf_win_left_offset = 0;
419 sps->conf_win_right_offset =
420 (
ctx->surface_width - avctx->
width) >>
desc->log2_chroma_w;
421 sps->conf_win_top_offset = 0;
422 sps->conf_win_bottom_offset =
423 (
ctx->surface_height - avctx->
height) >>
desc->log2_chroma_h;
425 sps->conformance_window_flag = 0;
431 sps->log2_max_pic_order_cnt_lsb_minus4 = 8;
433 sps->sps_sub_layer_ordering_info_present_flag =
434 vps->vps_sub_layer_ordering_info_present_flag;
435 for (
i = 0;
i <=
sps->sps_max_sub_layers_minus1;
i++) {
436 sps->sps_max_dec_pic_buffering_minus1[
i] =
437 vps->vps_max_dec_pic_buffering_minus1[
i];
438 sps->sps_max_num_reorder_pics[
i] =
439 vps->vps_max_num_reorder_pics[
i];
440 sps->sps_max_latency_increase_plus1[
i] =
441 vps->vps_max_latency_increase_plus1[
i];
448 sps->log2_min_luma_coding_block_size_minus3 = 0;
449 sps->log2_diff_max_min_luma_coding_block_size = 2;
451 sps->log2_min_luma_transform_block_size_minus2 = 0;
452 sps->log2_diff_max_min_luma_transform_block_size = 3;
454 sps->max_transform_hierarchy_depth_inter = 3;
455 sps->max_transform_hierarchy_depth_intra = 3;
457 sps->amp_enabled_flag = 1;
459 sps->sample_adaptive_offset_enabled_flag = 0;
460 sps->sps_temporal_mvp_enabled_flag = 0;
462 sps->pcm_enabled_flag = 0;
465 #if VA_CHECK_VERSION(1, 13, 0)
467 VAConfigAttribValEncHEVCFeatures features = { .value = priv->
va_features };
470 sps->amp_enabled_flag =
472 sps->sample_adaptive_offset_enabled_flag =
474 sps->sps_temporal_mvp_enabled_flag =
475 !!features.bits.temporal_mvp;
476 sps->pcm_enabled_flag =
481 VAConfigAttribValEncHEVCBlockSizes bs = { .value = priv->
va_bs };
482 sps->log2_min_luma_coding_block_size_minus3 =
484 sps->log2_diff_max_min_luma_coding_block_size =
487 sps->log2_min_luma_transform_block_size_minus2 =
488 bs.bits.log2_min_luma_transform_block_size_minus2;
489 sps->log2_diff_max_min_luma_transform_block_size =
490 bs.bits.log2_max_luma_transform_block_size_minus2 -
491 bs.bits.log2_min_luma_transform_block_size_minus2;
493 sps->max_transform_hierarchy_depth_inter =
494 bs.bits.max_max_transform_hierarchy_depth_inter;
495 sps->max_transform_hierarchy_depth_intra =
496 bs.bits.max_max_transform_hierarchy_depth_intra;
503 sps->num_short_term_ref_pic_sets = 0;
504 sps->long_term_ref_pics_present_flag = 0;
506 sps->vui_parameters_present_flag = 1;
571 .nuh_temporal_id_plus1 = 1,
574 pps->pps_pic_parameter_set_id = 0;
575 pps->pps_seq_parameter_set_id =
sps->sps_seq_parameter_set_id;
577 pps->num_ref_idx_l0_default_active_minus1 = 0;
578 pps->num_ref_idx_l1_default_active_minus1 = 0;
582 pps->cu_qp_delta_enabled_flag = (
ctx->va_rc_mode != VA_RC_CQP);
583 pps->diff_cu_qp_delta_depth = 0;
586 #if VA_CHECK_VERSION(1, 13, 0)
588 VAConfigAttribValEncHEVCFeatures features = { .value = priv->
va_features };
589 if (
ctx->va_rc_mode != VA_RC_CQP)
590 pps->cu_qp_delta_enabled_flag =
591 !!features.bits.cu_qp_delta;
593 pps->transform_skip_enabled_flag =
594 !!features.bits.transform_skip;
597 if (
pps->cu_qp_delta_enabled_flag)
598 pps->diff_cu_qp_delta_depth =
sps->log2_diff_max_min_luma_coding_block_size;
602 if (
ctx->tile_rows &&
ctx->tile_cols) {
605 pps->tiles_enabled_flag = 1;
606 pps->num_tile_columns_minus1 =
ctx->tile_cols - 1;
607 pps->num_tile_rows_minus1 =
ctx->tile_rows - 1;
612 for (
i = 0;
i <=
pps->num_tile_columns_minus1 &&
613 uniform_spacing;
i++) {
614 if (
ctx->col_width[
i] !=
615 (
i + 1) *
ctx->slice_block_cols /
ctx->tile_cols -
616 i *
ctx->slice_block_cols /
ctx->tile_cols)
619 for (
i = 0;
i <=
pps->num_tile_rows_minus1 &&
620 uniform_spacing;
i++) {
621 if (
ctx->row_height[
i] !=
622 (
i + 1) *
ctx->slice_block_rows /
ctx->tile_rows -
623 i *
ctx->slice_block_rows /
ctx->tile_rows)
626 pps->uniform_spacing_flag = uniform_spacing;
628 for (
i = 0;
i <=
pps->num_tile_columns_minus1;
i++)
629 pps->column_width_minus1[
i] =
ctx->col_width[
i] - 1;
630 for (
i = 0;
i <=
pps->num_tile_rows_minus1;
i++)
631 pps->row_height_minus1[
i] =
ctx->row_height[
i] - 1;
633 pps->loop_filter_across_tiles_enabled_flag = 1;
636 pps->pps_loop_filter_across_slices_enabled_flag = 1;
640 *vseq = (VAEncSequenceParameterBufferHEVC) {
641 .general_profile_idc =
vps->profile_tier_level.general_profile_idc,
642 .general_level_idc =
vps->profile_tier_level.general_level_idc,
643 .general_tier_flag =
vps->profile_tier_level.general_tier_flag,
645 .intra_period =
ctx->gop_size,
646 .intra_idr_period =
ctx->gop_size,
647 .ip_period =
ctx->b_per_p + 1,
648 .bits_per_second =
ctx->va_bit_rate,
650 .pic_width_in_luma_samples =
sps->pic_width_in_luma_samples,
651 .pic_height_in_luma_samples =
sps->pic_height_in_luma_samples,
654 .chroma_format_idc =
sps->chroma_format_idc,
655 .separate_colour_plane_flag =
sps->separate_colour_plane_flag,
656 .bit_depth_luma_minus8 =
sps->bit_depth_luma_minus8,
657 .bit_depth_chroma_minus8 =
sps->bit_depth_chroma_minus8,
658 .scaling_list_enabled_flag =
sps->scaling_list_enabled_flag,
659 .strong_intra_smoothing_enabled_flag =
660 sps->strong_intra_smoothing_enabled_flag,
661 .amp_enabled_flag =
sps->amp_enabled_flag,
662 .sample_adaptive_offset_enabled_flag =
663 sps->sample_adaptive_offset_enabled_flag,
664 .pcm_enabled_flag =
sps->pcm_enabled_flag,
665 .pcm_loop_filter_disabled_flag =
sps->pcm_loop_filter_disabled_flag,
666 .sps_temporal_mvp_enabled_flag =
sps->sps_temporal_mvp_enabled_flag,
669 .log2_min_luma_coding_block_size_minus3 =
670 sps->log2_min_luma_coding_block_size_minus3,
671 .log2_diff_max_min_luma_coding_block_size =
672 sps->log2_diff_max_min_luma_coding_block_size,
673 .log2_min_transform_block_size_minus2 =
674 sps->log2_min_luma_transform_block_size_minus2,
675 .log2_diff_max_min_transform_block_size =
676 sps->log2_diff_max_min_luma_transform_block_size,
677 .max_transform_hierarchy_depth_inter =
678 sps->max_transform_hierarchy_depth_inter,
679 .max_transform_hierarchy_depth_intra =
680 sps->max_transform_hierarchy_depth_intra,
682 .pcm_sample_bit_depth_luma_minus1 =
683 sps->pcm_sample_bit_depth_luma_minus1,
684 .pcm_sample_bit_depth_chroma_minus1 =
685 sps->pcm_sample_bit_depth_chroma_minus1,
686 .log2_min_pcm_luma_coding_block_size_minus3 =
687 sps->log2_min_pcm_luma_coding_block_size_minus3,
688 .log2_max_pcm_luma_coding_block_size_minus3 =
689 sps->log2_min_pcm_luma_coding_block_size_minus3 +
690 sps->log2_diff_max_min_pcm_luma_coding_block_size,
692 .vui_parameters_present_flag = 0,
695 *vpic = (VAEncPictureParameterBufferHEVC) {
696 .decoded_curr_pic = {
697 .picture_id = VA_INVALID_ID,
698 .flags = VA_PICTURE_HEVC_INVALID,
701 .coded_buf = VA_INVALID_ID,
703 .collocated_ref_pic_index =
sps->sps_temporal_mvp_enabled_flag ?
707 .pic_init_qp =
pps->init_qp_minus26 + 26,
708 .diff_cu_qp_delta_depth =
pps->diff_cu_qp_delta_depth,
709 .pps_cb_qp_offset =
pps->pps_cb_qp_offset,
710 .pps_cr_qp_offset =
pps->pps_cr_qp_offset,
712 .num_tile_columns_minus1 =
pps->num_tile_columns_minus1,
713 .num_tile_rows_minus1 =
pps->num_tile_rows_minus1,
715 .log2_parallel_merge_level_minus2 =
pps->log2_parallel_merge_level_minus2,
716 .ctu_max_bitsize_allowed = 0,
718 .num_ref_idx_l0_default_active_minus1 =
719 pps->num_ref_idx_l0_default_active_minus1,
720 .num_ref_idx_l1_default_active_minus1 =
721 pps->num_ref_idx_l1_default_active_minus1,
723 .slice_pic_parameter_set_id =
pps->pps_pic_parameter_set_id,
726 .sign_data_hiding_enabled_flag =
pps->sign_data_hiding_enabled_flag,
727 .constrained_intra_pred_flag =
pps->constrained_intra_pred_flag,
728 .transform_skip_enabled_flag =
pps->transform_skip_enabled_flag,
729 .cu_qp_delta_enabled_flag =
pps->cu_qp_delta_enabled_flag,
730 .weighted_pred_flag =
pps->weighted_pred_flag,
731 .weighted_bipred_flag =
pps->weighted_bipred_flag,
732 .transquant_bypass_enabled_flag =
pps->transquant_bypass_enabled_flag,
733 .tiles_enabled_flag =
pps->tiles_enabled_flag,
734 .entropy_coding_sync_enabled_flag =
pps->entropy_coding_sync_enabled_flag,
735 .loop_filter_across_tiles_enabled_flag =
736 pps->loop_filter_across_tiles_enabled_flag,
737 .pps_loop_filter_across_slices_enabled_flag =
738 pps->pps_loop_filter_across_slices_enabled_flag,
739 .scaling_list_data_present_flag = (
sps->sps_scaling_list_data_present_flag |
740 pps->pps_scaling_list_data_present_flag),
741 .screen_content_flag = 0,
742 .enable_gpu_weighted_prediction = 0,
743 .no_output_of_prior_pics_flag = 0,
747 if (
pps->tiles_enabled_flag) {
748 for (
i = 0;
i <= vpic->num_tile_rows_minus1;
i++)
749 vpic->row_height_minus1[
i] =
pps->row_height_minus1[
i];
750 for (
i = 0;
i <= vpic->num_tile_columns_minus1;
i++)
751 vpic->column_width_minus1[
i] =
pps->column_width_minus1[
i];
792 for (irap_ref = pic; irap_ref; irap_ref = irap_ref->
refs[1][0]) {
815 .nuh_temporal_id_plus1 = 1,
842 const int mapping[3] = {1, 2, 0};
843 const int chroma_den = 50000;
844 const int luma_den = 10000;
846 for (
i = 0;
i < 3;
i++) {
847 const int j = mapping[
i];
889 clli->max_pic_average_light_level =
FFMIN(clm->
MaxFALL, 65535);
897 size_t sei_a53cc_len;
911 vpic->decoded_curr_pic = (VAPictureHEVC) {
923 href =
ref->priv_data;
925 vpic->reference_frames[j++] = (VAPictureHEVC) {
926 .picture_id =
ref->recon_surface,
929 VA_PICTURE_HEVC_RPS_ST_CURR_BEFORE : 0) |
931 VA_PICTURE_HEVC_RPS_ST_CURR_AFTER : 0),
937 vpic->reference_frames[j] = (VAPictureHEVC) {
938 .picture_id = VA_INVALID_ID,
939 .flags = VA_PICTURE_HEVC_INVALID,
947 vpic->pic_fields.bits.reference_pic_flag = pic->
is_reference;
950 vpic->pic_fields.bits.idr_pic_flag = 1;
951 vpic->pic_fields.bits.coding_type = 1;
954 vpic->pic_fields.bits.idr_pic_flag = 0;
955 vpic->pic_fields.bits.coding_type = 1;
958 vpic->pic_fields.bits.idr_pic_flag = 0;
959 vpic->pic_fields.bits.coding_type = 2;
962 vpic->pic_fields.bits.idr_pic_flag = 0;
963 vpic->pic_fields.bits.coding_type = 3;
989 .nuh_temporal_id_plus1 = 1,
1003 (1 << (
sps->log2_max_pic_order_cnt_lsb_minus4 + 4)) - 1;
1010 int i, j, poc, rps_pics;
1015 memset(rps, 0,
sizeof(*rps));
1019 for (j = 0; j < pic->
nb_refs[
i]; j++) {
1022 rps_used[rps_pics] = 1;
1028 if (pic->
dpb[
i] == pic)
1031 for (j = 0; j < pic->
nb_refs[0]; j++) {
1032 if (pic->
dpb[
i] == pic->
refs[0][j])
1035 if (j < pic->nb_refs[0])
1038 for (j = 0; j < pic->
nb_refs[1]; j++) {
1039 if (pic->
dpb[
i] == pic->
refs[1][j])
1042 if (j < pic->nb_refs[1])
1047 rps_used[rps_pics] = 0;
1051 for (
i = 1;
i < rps_pics;
i++) {
1052 for (j =
i; j > 0; j--) {
1053 if (rps_poc[j] > rps_poc[j - 1])
1056 FFSWAP(
int, rps_poc[j], rps_poc[j - 1]);
1057 FFSWAP(
int, rps_used[j], rps_used[j - 1]);
1063 for (
i = 0;
i < rps_pics;
i++) {
1065 rps_poc[
i], rps_used[
i]);
1069 for (
i = 0;
i < rps_pics;
i++) {
1077 for (j =
i - 1; j >= 0; j--) {
1085 for (j =
i; j < rps_pics; j++) {
1097 sps->sps_temporal_mvp_enabled_flag;
1110 sps->sample_adaptive_offset_enabled_flag;
1120 *vslice = (VAEncSliceParameterBufferHEVC) {
1142 .slice_fields.bits = {
1146 .slice_temporal_mvp_enabled_flag =
1150 .num_ref_idx_active_override_flag =
1154 .slice_deblocking_filter_disabled_flag =
1156 .slice_loop_filter_across_slices_enabled_flag =
1163 vslice->ref_pic_list0[
i].picture_id = VA_INVALID_ID;
1164 vslice->ref_pic_list0[
i].flags = VA_PICTURE_HEVC_INVALID;
1165 vslice->ref_pic_list1[
i].picture_id = VA_INVALID_ID;
1166 vslice->ref_pic_list1[
i].flags = VA_PICTURE_HEVC_INVALID;
1173 vslice->ref_pic_list0[0] = vpic->reference_frames[0];
1176 vslice->ref_pic_list1[0] = vpic->reference_frames[0];
1181 vslice->ref_pic_list1[0] = vpic->reference_frames[1];
1187 vslice->ref_pic_list1[
i].picture_id = vslice->ref_pic_list0[
i].picture_id;
1188 vslice->ref_pic_list1[
i].flags = vslice->ref_pic_list0[
i].flags;
1200 #if VA_CHECK_VERSION(1, 13, 0)
1202 VAConfigAttribValEncHEVCBlockSizes block_size;
1203 VAConfigAttrib attr;
1206 attr.type = VAConfigAttribEncHEVCFeatures;
1207 vas = vaGetConfigAttributes(
ctx->hwctx->display,
ctx->va_profile,
1208 ctx->va_entrypoint, &attr, 1);
1209 if (vas != VA_STATUS_SUCCESS) {
1211 "features, using guessed defaults.\n");
1213 }
else if (attr.value == VA_ATTRIB_NOT_SUPPORTED) {
1215 "encoder features, using guessed defaults.\n");
1220 attr.type = VAConfigAttribEncHEVCBlockSizes;
1221 vas = vaGetConfigAttributes(
ctx->hwctx->display,
ctx->va_profile,
1222 ctx->va_entrypoint, &attr, 1);
1223 if (vas != VA_STATUS_SUCCESS) {
1225 "block size, using guessed defaults.\n");
1227 }
else if (attr.value == VA_ATTRIB_NOT_SUPPORTED) {
1229 "encoder block size, using guessed defaults.\n");
1231 priv->
va_bs = block_size.value = attr.value;
1234 1 << block_size.bits.log2_max_coding_tree_block_size_minus3 + 3;
1236 1 << block_size.bits.log2_min_luma_coding_block_size_minus3 + 3;
1252 ctx->slice_block_width =
ctx->slice_block_height = priv->
ctu_size;
1267 if (
ctx->va_rc_mode == VA_RC_CQP) {
1287 "%d / %d / %d for IDR- / P- / B-frames.\n",
1297 ctx->roi_quant_range = 51 + 6 * (
ctx->profile->depth - 8);
1305 #if VA_CHECK_VERSION(0, 37, 0)
1309 #if VA_CHECK_VERSION(1, 2, 0)
1329 .default_quality = 25,
1336 .sequence_params_size =
sizeof(VAEncSequenceParameterBufferHEVC),
1339 .picture_params_size =
sizeof(VAEncPictureParameterBufferHEVC),
1342 .slice_params_size =
sizeof(VAEncSliceParameterBufferHEVC),
1345 .sequence_header_type = VAEncPackedHeaderSequence,
1348 .slice_header_type = VAEncPackedHeaderHEVC_Slice,
1368 "in 8-bit unsigned integer.\n", avctx->
level);
1372 ctx->desired_packed_headers =
1373 VA_ENC_PACKED_HEADER_SEQUENCE |
1374 VA_ENC_PACKED_HEADER_SLICE |
1375 VA_ENC_PACKED_HEADER_MISC;
1378 ctx->explicit_qp = priv->
qp;
1394 #define OFFSET(x) offsetof(VAAPIEncodeH265Context, x)
1395 #define FLAGS (AV_OPT_FLAG_VIDEO_PARAM | AV_OPT_FLAG_ENCODING_PARAM)
1400 {
"qp",
"Constant QP (for P-frames; scaled by qfactor/qoffset for I/B)",
1403 {
"aud",
"Include AUD",
1406 {
"profile",
"Set profile (general_profile_idc)",
1410 #define PROFILE(name, value) name, NULL, 0, AV_OPT_TYPE_CONST, \
1411 { .i64 = value }, 0, 0, FLAGS, .unit = "profile"
1417 {
"tier",
"Set tier (general_tier_flag)",
1419 { .i64 = 0 }, 0, 1,
FLAGS, .unit =
"tier" },
1421 { .i64 = 0 }, 0, 0,
FLAGS, .unit =
"tier" },
1423 { .i64 = 1 }, 0, 0,
FLAGS, .unit =
"tier" },
1425 {
"level",
"Set level (general_level_idc)",
1429 #define LEVEL(name, value) name, NULL, 0, AV_OPT_TYPE_CONST, \
1430 { .i64 = value }, 0, 0, FLAGS, .unit = "level"
1433 {
LEVEL(
"2.1", 63) },
1435 {
LEVEL(
"3.1", 93) },
1436 {
LEVEL(
"4", 120) },
1437 {
LEVEL(
"4.1", 123) },
1438 {
LEVEL(
"5", 150) },
1439 {
LEVEL(
"5.1", 153) },
1440 {
LEVEL(
"5.2", 156) },
1441 {
LEVEL(
"6", 180) },
1442 {
LEVEL(
"6.1", 183) },
1443 {
LEVEL(
"6.2", 186) },
1446 {
"sei",
"Set SEI to include",
1449 0, INT_MAX,
FLAGS, .unit =
"sei" },
1451 "Include HDR metadata for mastering display colour volume "
1452 "and content light level information",
1455 INT_MIN, INT_MAX,
FLAGS, .unit =
"sei" },
1457 "Include A/53 caption data",
1460 INT_MIN, INT_MAX,
FLAGS, .unit =
"sei" },
1462 {
"tiles",
"Tile columns x rows",
1473 {
"i_qfactor",
"1" },
1474 {
"i_qoffset",
"0" },
1475 {
"b_qfactor",
"6/5" },
1476 {
"b_qoffset",
"0" },
1490 .
p.
name =
"hevc_vaapi",
1509 .p.wrapper_name =
"vaapi",